这是一个FPGA

LDPC的短码，码长为40速率为0.5的LDPC码的设计，用的是QC矩阵，压缩文件为原码部分，工程太大传不上去。(LDPC short code, a code length of 40 rate of 0.5 LDPC code design, using a QC matrix, the compressed file is part of the original code, do not pass up the works too.)

Three-input Majority Voter -- The entity declaration is followed by three alternative architectures which achieve the same functionality in different ways. -Three-input Majority Voter -- The entity declaration is followed by three alternative architectures which achieve the same functionality in different ways.

基本交通系统,实现城市交通路口的模拟仿真，自己的课程设计作品(Basic transport system, urban traffic junction simulation, design their own courses)

Quartus2环境下基于VHDL状态机的交通灯程序(VHDL state machine traffic lights based on Quartus2 environment)

通过正弦波和三角波的比较产生SPWM波形(Through the comparison of sine wave and triangle wave produces SPWM waveform)

用VHDL实现了希尔伯特滤波器,即就是幅度不变，而相位移动90度(use vhdl to accomplish the hilbert filter)

verilog RTL code for simple TCAM

一百多个例子很好的verilog 学习资料，大家可以多多参考，适合初学者学习-More than 100 examples of good learning materials Verilog, you can a lot of reference, suitable for beginners to learn

VHDL Code For Full Adder By Data Flow Modelling

在vhdl开发环境下，关于协议PS2 verilog 源码-In VHDL development environment, with regard to the agreement PS2 verilog source code