RS232协议Verilog实现

这 VHDL/Verilog 或 C/c + + 源代码并作为设计参考说明了如何实现这些类型的功能。这是用户的责任，来验证其设计的一致性和使用形式化验证方法的功能。

说明：  一个简单的千兆以太网UDP协议的实现,可以实现数据的收发和ARP，实现PC端与FPGA的以太网通信(A simple implementation of Gigabit Ethernet UDP protocol can realize data sending and receiving and ARP, and realize Ethernet communication between PC and FPGA.)

根据ASMD图设计验证冒泡排序算法。给出设计程序及时序仿真结果，含纸质报告。(According to the ASMD diagram design, verify the bubble sorting algorithm. Give the design procedure and the simulation result in time, including paper report.)

说明：  此代码是由FPGA产生SPWM波的代码，简单易懂(use FPGA to generate SPWM)

VHDL语言编程简单实例若干，适合于初学者(VHDL language programming simple example, suitable for beginners)

verilog编写的并行256点fft代码(Verilog prepared parallel 256 points fft code)

说明：  Xilinx vivado 权威教程，清华大学出版社出版，何宾编著。(Xilinx vivado authoritative course, published by Tsinghua University Press, edited by He Bin.)

8253可编程定时器/计数器芯片 VeriLog实现(8253 programmable timer/counter chip VeriLog achieve)

采用Verilog语法编写的UDP协议网络  能够实现UDP包的发送和接收 采用Verilog语法编写的UDP协议网络  能够实现UDP包的发送和接收 采用Verilog语法编写的UDP协议网络  能够实现UDP包的发送和接收

C语言写得FIR滤波器代码，简单实用，是学习滤波器设计的好材料，附带PPT滤波器设计说明(C language written FIR filter code, simple and practical, is a good learning materials of filter design, with PPT filter design )