oc8051 Verilog代码，关于

该工程是基于verilog hdl 语言编写的帧传输协议HDLC帧的发送端代码，会用QUATUSII的人都应该知道如何使用，希望能给你带来帮助-The project is based on the language verilog hdl frame transmission protocol HDLC frame of this generation- Codes will be used QUATUSII people should know how to use, in the hope of giving you helpful

Xilinx 的DDR SDRAM控制器，用Verilog HDL描述- A DDR SDRAM contraller sample descripte in Verilog HDL ,base on Xilinx FPGA

说明：  LIUSHUIDENG VHDLYUYAN XIADE SHUIDENG(LEDWATER I WRITER IT MYSILF.IT'S EASY ! YOU CAN WRITER IT,TOO)

CAN总线的数据采集，FPGA到USB。verilog hdl语言。(CAN bus data acquisition, FPGA to the USB. verilog hdl language.)

verilog 代码. 经验证成功,可以作为标准单元库,为FPGA设计者使用.-Verilog code. Certified success, as a standard cell library for the use of FPGA designers.

用流水线的方法实现16位乘法器，运算速度快，消耗时钟资源少(Pipeline method to realize 16-bit multiplier, which is fast in operation and consumes less clock resources)

vhdl 实现fpga 闪灯控制 流水线闪灯 还用signalTAP进行检测，给初学者参考(vhdl fpga flash control lines to achieve flash is also used signalTAP testing, to advanced users)

FIR带通、带阻滤波器设计，需要输入截止频率以及容许偏差。(FIR band pass and band stop filter design)

说明：  TI公司的DAC5578驱动程序，经测试过的，CSDN资源分享(DAC5578 Driver of TI Company Tested and CSDN Resource Sharing)

LFSR模块，单个模块，实现移位寄存器，生成测试用pattern-LFSR