全数字fsk调制解调的实现 verilog源码

关于vhdl的一些例子-on some of the examples of VHDL

一个使用VHDL设计的具有强大功能的32位CPU，这个文件包含了与之配套的PCI位码文件及配置程序。-A VHDL design with the use of powerful 32-bit CPU, this document contains a complete set of the PCI code files and configuration procedures.

PLD与8051接口的参考设计 Xilinx提供的verilog源代码-PLD 8051 interface with the Xilinx Reference Design for the Verilog source code

一個紅外線感測電路的設計，是經由opa來設計。(An infrared sensing circuit design, is designed by opa.)

实用的程序代码，希望对大家有用，已经调试通过-Practical program code, in the hope that useful to everybody, has debugging through

this come from alter ,you can look and find it on line about h263.

VHDL的应用：USB-BLASTER的原理图-VHDL FOR USB-BLASTER

VHDL写时钟，分频模块什么，实现计时。定点报时，定点闹钟，显示年月日。(verilog HDL)

关于i2c master/slaver control 方面的技术资料 介绍其特色与使用方法(On the i2c master/slaver control of technical information on their characteristics and use)

FPGA用于实现crc16编码的verlog源程序，用到的请下载。(FPGA is used to achieve the the crc16 the encoding of verlog source code used to download.)