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maichongceliang
对于已获得的脉冲包络采样序列,需测量的脉冲特征参数主要有:脉冲幅值(PA)、脉冲到达时间(TOA)和脉冲宽度(PW)。实际测量中,脉冲波形的形状是各种各样的,但其主要的参数有脉冲幅度、脉冲宽度、脉冲周期、脉冲占空比、脉冲前沿(上升时间)、脉冲后沿(下降时间)、脉冲上冲、脉冲下冲、脉冲下垂、脉冲顶部不平度等,脉冲参数的计量主要就是对这些参数进行计量。本程序包实现基于FPGA实现脉冲宽度和重复周期的测量。(Who have access to the pulse envelope sample sequence, the pulse measurement to be the main characteristic parameters are: pulse amplitude (PA), pulse time of arrival (TOA) and pulse width (PW). The actual measurement, the pulse shape is a wide variety of shapes, but its main parameters of the pulse amplitude, pulse width, pulse period, pulse duty cycle, pulse leading edge (rise time), pulse along (down time), the red pulse, pulse undershoot, pulse droop, pulse irregularities, such as at the top, the measurement of pulse parameters is mainly the measurement of these parameters. The package FPGA-based pulse width and repetition to achieve the measurement cycle.)
- 2009-07-08 14:32:08下载
- 积分:1
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Collected their own routines VHDL code, suitable for beginners to learn, I hope...
自己收集的VHDL例程代码,适合初学者学习用,希望能给大家带来帮助。-Collected their own routines VHDL code, suitable for beginners to learn, I hope we can help.
- 2022-07-02 04:49:52下载
- 积分:1
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A3P600-PQG208
Actel FPGA A3P600最小系统原理图,包含JTAG 、电源和封装 (Actel FPGA A3P600 minimum system schematics, including JTAG, power and packaging)
- 2012-12-03 11:29:19下载
- 积分:1
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bianyuanjiance
图像采集 VGA输出 图像的边缘 ov7670(V image acquisition VGA output image edge)
- 2020-06-21 13:20:06下载
- 积分:1
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这是一个很好的USB程序。
这是一个很好的USB程序。-This is a very good USB procedures.
- 2022-01-26 00:08:09下载
- 积分:1
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4x4Key_daisy090708
使用Altera公司的FPGA进行VHDL开发。使用quartus2 9.0软件在EP1C3T144C8开发板上实现对4x4键盘的输入控制,并显示在一个8段式数码管上。(The use of Altera' s FPGA-VHDL development. Use quartus2 9.0 software EP1C3T144C8 the development board to realize 4x4 keyboard input control, and displayed in an eight-stage digital pipe.)
- 2009-09-25 06:24:34下载
- 积分:1
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mul_ser12
本源码是用Verilog编写的12位移位相加乘法器的设计源码,开发软件为MAX+PLUS,已经测试通过。(The Verilog source code is written in the sum of 12-bit shift multiplier design source code, developing software for the MAX+ PLUS, has been tested.)
- 2011-05-31 14:19:30下载
- 积分:1
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DCT
用verilog语言实现DCT编解码
附有DCT的说明(Using Verilog language realize DCT codec with a description of DCT)
- 2020-11-14 15:19:41下载
- 积分:1
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verilog-lfsr-master
Fully parametrizable combinatorial parallel LFSR/CRC module. Implements an unrolled LFSR next state computation. Includes full MyHDL testbench.
- 2020-06-24 21:40:01下载
- 积分:1
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protel library 2 in fpga package, very difficult to find the
protel中fpga封装库2,非常难找的-protel library 2 in fpga package, very difficult to find the
- 2022-07-03 08:50:31下载
- 积分:1