SPI (Serial Peripheral Interface) is serial, synchronous, full duplex communicat...

3-8译码器，可以讲三位二进制输入转换为8中取1的输出信号(3-8 decoder, you can talk about the three binary input is converted to 8 of the output signal from 1)

FPGA-based high-speed image acquisition system

说明：  俄罗斯方块游戏，采用Verilog编写，整个工程文件，TFT/VGA显示(Tetris game, written by Verilog, the whole project file, TFT / VGA display)

VHDL实现SPI功能源代码 -- The SPI bus is a 3 wire bus that in effect links a serial shift -- register between the "master" and the "slave". Typically both the -- master and slave have an 8 bit shift register so the combined -- register is 16 bits. When an SPI transfer takes place, the master and -- slave shift their shift registers 8 bits and thus exchange their 8 -- bit register values.-SPI realize the functional VHDL source code The SPI bus is a 3 wire bus that in effect links a serial shift register between the

FPGA_CPLD-SHC多款FPGA CPLD开发板的原理图，很好的线路设计参考(FPGA_CPLD-SHC Variety of FPGA CPLD development board schematics, a good reference circuit design)

利用verilog编写的电梯程序，实现基本的电梯运行功能(Elevator program written by Verilog)

一个简单的UCOSII操作系统，在DE2上面调试通过(A simple UCOSII operating systems, debugging through the DE2 above)

VGA显示彩条DE2_70开发板 验证过的(VGA display color bar DE2_70 development board validated)

vga显示彩色图像ip，alter开发板-vga display color image,vhdl,quartus

FGAP控制模拟量输出芯片DAC8812(FGAP control analog output chip DAC8812)