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jitter_eliminate
verilog描述的实用消抖电路,采用三个D触发器和一个JK触发器。使用emacs编写源文件,iverilog仿真通过,内有png仿真图像截屏(verilog description of the practical elimination shake circuit, using three D flip-flop and a JK flip-flop. Prepared source files using the emacs , iverilog simulation adopted, within the simulation images png screenshots)
- 2009-11-24 15:51:44下载
- 积分:1
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IRIG_DC_Decoder
IRIG_B解码器,直接解码IRIG_B DC(IRIG_B decoder)
- 2021-04-09 16:58:59下载
- 积分:1
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SignalTap-II-instruction
对于学习FPGA的同学来说仿真是必不可少的流程 但是仿真的方法signal tap是必须掌握的(For students learning FPGA simulation is an essential process but the simulation method tap signal is a must)
- 2016-04-18 16:28:51下载
- 积分:1
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展位乘数
光滑的乘法 ;算法是 ;乘法 ;算法,将两个带符号的二进制数的补码表示法。该算法是由安得烈唐纳德发明的展位 ; ;1950在伯克贝克学院在布卢姆斯伯里研究晶体学,伦敦
- 2022-03-17 06:55:54下载
- 积分:1
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AES_128
AES 128 bit with various device interface on FPGA
- 2021-03-09 17:59:27下载
- 积分:1
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1553B总线接口技术研究及FPGA实现
基于FPGA的1553b接口设计详细设计论文(1553B design based on FPGA)
- 2019-04-18 11:02:52下载
- 积分:1
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add
浮点加法器的用Verilog实现,32位的浮点加法器(Floating point adder Verilog)
- 2021-02-28 12:49:35下载
- 积分:1
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AD
说明: ADC AD7768-1单通道24bitADC驱动程序(ADC ad7768-1 single channel 24bit ADC driver)
- 2020-07-13 13:55:08下载
- 积分:1
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Simulate
FPGA控制AD逐点采集信号,并将AD转换后的数据串行发送出去。(FPGA to control the signal sampling point by point AD, AD conversion and serial data sent.)
- 2021-04-14 21:08:55下载
- 积分:1
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DW_apb_timer
verilog实现计时器timer,可直接用于芯片开发中。(verilog achieve timer, it can be directly used for chip development.)
- 2016-04-05 22:37:39下载
- 积分:1