编码器信号转换程序

11阶fir数字滤波器的verilog程序设计，线性相位，系数量化处理(11 order of fir digital filter verilog programming, linear phase, the coefficient quantization)

说明：  MATLAB to HDL Code conversion

This is a divider, which is depicted as well. It is a programming language Vhdl.

使用 nios 和 verilog hdl tcp/ip 通信通过使用来创建 DM9000A，它可以工作到 5 Mb/s 我已经用它在 DE2 板，你下载它和可以将复制到您的项目，然后使用它直接

Verilog语言下QAM调制的DDS实现(The QAM Modulation DDS achieve)

实现了光OFDM模块的各个功能，同时仿真分析了OFDM的载波幅度谱、相位谱、每个载波对应的时域信号、整个时域/频域的OFDM、每个接收符号的分布图。计算了相位差等等(To achieve the various functions of the optical OFDM module, the simulation analysis of the the the OFDM carrier amplitude spectrum and phase spectrum, and the time domain signal corresponding to each carrier, the whole time domain/frequency domain OFDM, each reception symbol maps. Calculated phase difference)

用verilog编程的TCON模块（时序控制器）的程序(Verilog programming module with TCON (timing controller) program)

采用Xilinx公司的Spartan6 FPGA设计PCI Express的详细参考资料(Xilinx' s PCI Express, Spartan6 FPGA design, detailed reference information)

About 1588 PTP protocol xillinx FPGA running code and Software application, and to introduce documents, want to help everyone

FPGA按键延时模块，产生key_value和key_flag 可直接例化调用(The key delay module of FPGA)