verilog编写的1024点的fft快速傅立叶变换代码

The objective of this project is to design and implement the controller for an electronic safe. You will interface a 16-button keypad to the NIOS boards. The combination code of the safe will be the last

四个实验带你入门Basys3，快速入门，轻松上手74 系列IP 封装实验示波器实验设计信号发生器实验设计Microblaze 串口实验内附源码

zybo-Embedded System Design Flow on Zynq 实现ZYBO接受串口的数据，然后将键盘数据的4位二进制码通过四个LED灯显示：

在QUARTUS II上实现（7,4）汉明码的译码VHDL语言设计((7,4)Hamming decoder)

频率计，测量频率。可测范围为100HZ至60khz.测量比较稳定。基于MSPg2553(Frequency meter, measuring frequency. Measurable range 100HZ to 60khz. Stable measurement)

光纤发送接收模块，verilog编写，主要用于光纤的发送和接收，波长1310nm(Fiber optic transmitter receiver module, verilog written primarily for transmitting and receiving the optical fiber, wavelength 1310nm)

matlab bpsk with rayleigh performance expirement

在FPGA上用Verilog实现的UART串口通信模块，包含分频模块，接收模块，发送模块，可以更改波特率，适合初学者学习，已经在板子上得到了验证。

XAPP224 VHDL Data Recovery design file

Verilog编程语言经典手册Classic Manual Verilog programming language(Verilog programming language classic manual Classic Manual Verilog programming language)