ALU con operaciones de suma · · 雷斯塔

说明：  quartusii软件仿真实验代码 双二选一(quartusii software simulation code for a pair of two elections)

ADC-DAC transmittion works thru SPI on 25 MHZ. Used for some student project on Xilinx sprtan3a FPGA

包含一个ALU，实现斐波那契数列的计算。1.接受两个6位二进制输入。2.通过手动输入的时钟驱动每个周期进行一次计算。3.结果输出到led灯（使用NEXYS4开发板）(Including an ALU to realize the calculation of Fibonacci sequence. 1. Accept two 6-bit binary inputs. 2. Each cycle is driven by a clock input manually. 3. Output to LED lamp (using NEXYS4 development board))

华为fpga设计全套,经典入门教程，华为fpga设计全套，(verilog,HUAWEI FPGA design complete set)

说明：  PicoRV32 is a CPU core that implements the RISC-V RV32IMC Instruction Set. It can be configured as RV32E, RV32I, RV32IC, RV32IM, or RV32IMC core, and optionally contains a built-in interrupt controller. Tools (gcc, binutils, etc..) can be obtained via the RISC-V Website. The examples bundled with PicoRV32 expect various RV32 toolchains to be installed in /opt/riscv32i[m][c]. See the build instructions below for details.

用fpga芯片使用vhdl语言对AD转换芯片ADC0809进行控制(Using the fpga chip use language of VHDL AD transform chip ADC0809 control)

8aqm调制串并转（1:3）换部分vhdl程序(8aqm string and convert vhdl program)

verilog编写的并行256点fft代码(Verilog prepared parallel 256 points fft code)

说明：  基于Verilog语言编写的LCD1602显示的日历程序，类似时钟功能值得参考。(LCD1602 shows calendar program based on Verilog language, similar clock function is worth reference.)