ALU con operaciones de suma · · 雷斯塔

动态获取CPU使用率源码 可以加到压力测试里(Dynamic access to CPU use the source code )

用verilog 语言编译16QAM调制(a great complied code of 16QAM modulation for OFDM)

SPI NOR Flash控制器Verilog源代码(SPI NOR Flash controller Verilog)

非常不错的SDRAM代码，重点学习状态的划分，如何优化控制，以及刷新操作。

非常好的EPM570(CPLD)学习程序源码,适合初学者,能让其快速入门(Very good EPM570 (CPLD) learning program source code, suitable for beginners, allowing its Quick Start)

FPGA之间通信，或者FPGA和DSP之间通信的接口协议，用verilog代码编写，验证可用！

一个三分频verilog模块，可以用来学习基本结构。(A three points frequency verilog module can be used to study the basic structure.)

fpga配置锁相环完整程序，使用quartus IP核，Verilog语言。(FPGA configuration PLL complete program, Verilog language.)

actel flash rom使用 actel flash rom使用(actel flash rom actel flash rom)

说明：  In the data management system a significant role of the Data link layer is to convert the unreliable physical link between reader and tag into a reliable link. Therefore, the RFID system employs the Cyclic Redundancy Check (CRC) as an error detection scheme. In addition for reader to communicate with the multiple tags, an anti-collision technique is required. The technique is to coordinate the communication between the reader and the tags. The common deterministic anti-collision techniques are based on the Tree algorithm such as the Binary Tree and the Query Tree algorithms.