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DDSN
quartus II 13.0 DDS工程文件,采用VHDL编写,可输出正交两路正弦信号。可以直接用modelsim-alter 仿真(quartus II 13.0 DDS project file, using VHDL written two orthogonal sinusoidal output signals. Can be simulated directly modelsim-alter)
- 2021-03-20 16:49:17下载
- 积分:1
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20190717
uart documentation, july 17, 2019. the document describes the basics of verilog programming and how to implement them on an fpga device
- 2020-06-21 21:40:01下载
- 积分:1
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spi转i2s的verilog程序,fpga是总模块,spi和i2s是子模块,shiftreg是转换...
spi转i2s的verilog程序,fpga是总模块,spi和i2s是子模块,shiftreg是转换-spi transfer i2s the verilog program, fpga is the total module, spi, and i2s is the sub-module, shiftreg is to convert
- 2022-02-13 16:18:27下载
- 积分:1
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采用systemc语言设计了一个状态机,主要包括两个进程,仿真结果表明状态机可以正常工作...
采用systemc语言设计了一个状态机,主要包括两个进程,仿真结果表明状态机可以正常工作-Systemc language designed using a state machine, mainly consists of two processes, the simulation results show that the state machine can work properly
- 2022-03-17 09:47:30下载
- 积分:1
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OFDM-Verilog
基于FPGA的OFDM的实现,Verilog语言。(OFDM based on FPGA,by Verilog)
- 2021-02-03 20:59:58下载
- 积分:1
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sram_060803
SRAM的读写代码,对SRAM进行了乒乓操作,用VHDL语言进行设计,很有参考价值,甚至可以直接复制代码来进行自己的设计(SRAM read and write code, ping-pong operation carried out on the SRAM, using VHDL language design, of great reference value, or even directly copy the code to carry out their own designs)
- 2020-12-04 10:39:24下载
- 积分:1
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可综合的Verilog语法(剑桥大学,影印)
可综合的Verilog语法(剑桥大学,影印).(A comprehensive Verilog Grammar (University of Cambridge, photocopy).)
- 2018-01-13 00:32:05下载
- 积分:1
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flash
本程序是fpga控制flash的读写程序,包括了程序和仿真时的测试文件(fpga flash)
- 2013-07-21 14:47:36下载
- 积分:1
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实现PWM波型....使用VHDL语言
实现PWM波型....使用VHDL语言-Realization of PWM waveform using the VHDL language ....
- 2022-09-10 03:00:02下载
- 积分:1
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can-lite-vhdl-master
CAN VHDL Code. Behavioral implementation of CAN bus interface.
- 2021-01-19 21:48:41下载
- 积分:1