ps2接口源程序。标准的键盘和鼠标接口，在Xilinx SpartanII XC2S200 实验板上通过验证...

quartus II 13.0 DDS工程文件，采用VHDL编写，可输出正交两路正弦信号。可以直接用modelsim-alter 仿真(quartus II 13.0 DDS project file, using VHDL written two orthogonal sinusoidal output signals. Can be simulated directly modelsim-alter)

uart documentation, july 17, 2019. the document describes the basics of verilog programming and how to implement them on an fpga device

spi转i2s的verilog程序，fpga是总模块，spi和i2s是子模块，shiftreg是转换-spi transfer i2s the verilog program, fpga is the total module, spi, and i2s is the sub-module, shiftreg is to convert

采用systemc语言设计了一个状态机，主要包括两个进程，仿真结果表明状态机可以正常工作-Systemc language designed using a state machine, mainly consists of two processes, the simulation results show that the state machine can work properly

基于FPGA的OFDM的实现，Verilog语言。(OFDM based on FPGA,by Verilog)

SRAM的读写代码，对SRAM进行了乒乓操作，用VHDL语言进行设计，很有参考价值，甚至可以直接复制代码来进行自己的设计(SRAM read and write code, ping-pong operation carried out on the SRAM, using VHDL language design, of great reference value, or even directly copy the code to carry out their own designs)

可综合的Verilog语法（剑桥大学，影印）.(A comprehensive Verilog Grammar (University of Cambridge, photocopy).)

本程序是fpga控制flash的读写程序，包括了程序和仿真时的测试文件(fpga flash)

实现PWM波型....使用VHDL语言-Realization of PWM waveform using the VHDL language ....

CAN VHDL Code. Behavioral implementation of CAN bus interface.