1920*1080的VGA驱动模块设计

闪耀光栅 有带阻滤波器作用的闪耀光纤光栅，反射角度可以控制(Blazed grating)

利用ISE工具，完成对v6系列的FPGA上PCIE以及DMA数据测试仿真，可以通过编译产生仿真波形，也可以根据自己的开发板烧录到自己的板子上

说明：  使用Verilog HDL ，FM调制信号。(Using Verilog, HDL, and FM modulation signals.)

程序是完整的一个数字下变频器的一个Verilog程序，经测试可以使用，欢迎下载(Program is a complete Verilog program a digital down converter, tested can be used, please download)

verilog语言设计的VGA驱动。在Quarus11.0下编译成功，并在Altera cyclone4开发板上测试OK(verilog language design VGA driver. In Quartus11.0 successfully compiled and Altera cyclone4 development board test OK)

this contain the source code for noise cancellation ,which can be used in c platform.

使用VHDL语言实现对快速傅立叶变换算法的实现，并通过仿真验证其正确性。(Using VHDL language implementation for the realization of fast Fourier transform algorithm, and its correctness is validated by computer simulation.)

说明：  fpga串口的发送程序基于verilog语言拿走不用谢。(The sending program of FPGA serial port is based on Verilog language.)

海德汉绝对式编码器代码，VHDL语言编写(Heidenhain absolute encoder code, VHDL language)

The AGC is a smart programmable gain amplifier (PGA). The amplifier gain is adjusted based upon the input signal level so that the output is at a specified Target Gain. The AGC can be configured to be either a mono or stereo input / output component. For illustration purposes, the following discussion will highlight the stereo configuration.