电梯控制器

用uvm验证方法学验证异步fifo，文件包括异步FIFOrtl代码和uvm组件(Verification of asynchronous FIFO with UVM)

8051 1Khz sine wave generator. make use of DAC0808 and timer 0 interrupt. Also single led is blinked continuously.

扩频通信的Verilog工程，对从事无线通信的工程人员有参考作用。(Spread spectrum communication Verilog project, engaged in wireless communications engineering staff reference.)

isa MEMORY PLAN eu biu asm

说明：  artix 7系列 fpga mig ddr3应用教程(Artix 7 Series FPGA MIG DDR3 Application Tutorial)

quartus II 13.0 DDS工程文件，采用VHDL编写，可输出正交两路正弦信号。可以直接用modelsim-alter 仿真(quartus II 13.0 DDS project file, using VHDL written two orthogonal sinusoidal output signals. Can be simulated directly modelsim-alter)

I2C verilong code  详细代码分析，根据协议每一步都有分析，进过验证，代码分slave和master部分，代码比较成熟

说明：  此代码是由FPGA产生SPWM波的代码，简单易懂(use FPGA to generate SPWM)

verilog code for 8 bit alu

写一个单周期处理器运行一段mips指令，并包含mips指令转汇编码的程序(Write a single cycle processor to run a section of MIPS instruction)