-
verilog to write a telephone billing program
verilog 写的 电话计费器程序-verilog to write a telephone billing program
- 2023-01-29 16:55:03下载
- 积分:1
-
arbiter_ip
Arbiter code for simulation purpose
- 2013-07-13 17:45:11下载
- 积分:1
-
dw_apb_rtc_db
verilog实现rtc文档,可用于实现RTC。(verilog realize rtc document can be used to implement the RTC.)
- 2016-04-05 22:39:37下载
- 积分:1
-
I2C
This is the source code for I2C(Inter Integreted Circuit) which is used in serial communication
- 2009-09-22 21:52:52下载
- 积分:1
-
It is a fir to implement in a FPGA. It s not desenvolved for me it is a good wor...
It is a fir to implement in a FPGA. It s not desenvolved for me it is a good work of another person
- 2022-03-29 20:48:40下载
- 积分:1
-
点阵汉字显示的VHDL原程序.综合实验课程的程序,完全可以用的 希望大家支持啊...
点阵汉字显示的VHDL原程序.综合实验课程的程序,完全可以用的 希望大家支持啊-Dot-matrix characters shown in the original VHDL program. Comprehensive experimental program procedures, can be used to hope you will support the ah
- 2022-03-25 16:49:49下载
- 积分:1
-
hdb3
这是一个很全的HDB3译码的verilog程序,用于FPGA入门所用,verilog的入门很好的程序(This is a very wide of the HDB3 decoding verilog program for entry-FPGA used, verilog entry procedures for good)
- 2021-04-22 16:08:48下载
- 积分:1
-
UART_prj_ViHDL
vhdl project at sbu uni in iran
uart
- 2010-05-08 16:18:37下载
- 积分:1
-
FPGA应用举例,非常适合初学者,高手莫下
FPGA应用举例,非常适合初学者,高手莫下-FPGA application, for example, very suitable for beginners, experts, under Mo
- 2022-10-06 03:30:03下载
- 积分:1
-
用VHDL语言将二进制数据转换成十进制数据,并将十进制的每一个位分离出来单独存放。使用状态机实现,程序简单,仿真效果很理想,占用可编程器件的资源较少。...
用VHDL语言将二进制数据转换成十进制数据,并将十进制的每一个位分离出来单独存放。使用状态机实现,程序简单,仿真效果很理想,占用可编程器件的资源较少。-VHDL language with the binary data into decimal data and decimal places separated from each store individually. Realize the use of state machine, the program is simple, simulation results are satisfactory, occupation of programmable devices have fewer resources.
- 2023-03-27 15:30:04下载
- 积分:1