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SPI经典ip核
可以直接用于工程的开发和利用
SPI经典ip核
可以直接用于工程的开发和利用-err
- 2023-02-04 19:10:03下载
- 积分:1
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canny
说明: canny 边缘检测基于梯度直方图的自适应阈值verilog实现(Canny edge detection based on gradient histogram adaptive threshold Verilog implementation)
- 2021-04-12 14:48:57下载
- 积分:1
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FLASH_PCB
M25P64-SPI-FLASH芯片的FPGA控制程序,已仿真验证(M25P64- SPI- FLASH chip FPGA control program, simulation)
- 2020-08-28 16:48:12下载
- 积分:1
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RS译码的Euclid算法及其FPGA实现,并通过仿真器的出结果,对于设计RS译码很有帮助...
RS译码的Euclid算法及其FPGA实现,并通过仿真器的出结果,对于设计RS译码很有帮助-RS decoding Euclid algorithm and its FPGA implementation, and through the simulator results are helpful for the design of RS decoder
- 2022-08-20 11:45:06下载
- 积分:1
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本例为ADC0809接口电路VHDL程序原代码
本例为ADC0809接口电路VHDL程序原代码-The ADC0809 Interface Circuit Example for VHDL program source code
- 2022-05-19 18:28:38下载
- 积分:1
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module_dem
用verilog编写的信号调制解调程序,包括ask,fsk,qpsk的fpga实现(Prepared using verilog signal modulation and demodulation process, including ask, fsk, qpsk of fpga implementation)
- 2009-10-14 14:47:30下载
- 积分:1
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The_entire_FPGA_design_flow_Modelsim_Synplify
详细的说明了FPGA设计的整个流程
FPGA设计全流程Modelsim>>Synplify.Pro>>ISE(Detailed description of the FPGA design flow of the entire FPGA design flow full Modelsim> > Synplify.Pro> > ISE)
- 2009-04-06 10:12:48下载
- 积分:1
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16ChannelDeserializer
LVDS De-serialization
- 2019-06-20 14:53:25下载
- 积分:1
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rs_204_188----v1.0
RS 编码和解码Verilog Code, 实现了RS(204,188)的编码和译码;(RS Coding and Decoding Verilog code, implement RS(204,188) )
- 2021-03-25 20:29:14下载
- 积分:1
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SERDES_handbook
SERDES资料,包括reliability_handbook,serdes_handbook,serdes_introduction(SERDES doc,include reliability_handbook,serdes_handbook,serdes_introduction)
- 2017-01-12 18:28:41下载
- 积分:1