基于BASYS2模60计数器

dsp与fpga通信的verilog程序，强烈推荐欢迎参考(dsp and fpga verilog communication program, it is strongly recommended to welcome reference)

64点的 FFT verilog,它是串行计算的，工作频率不到100M，计算速率很高，里面的层次很清晰。(64-point FFT verilog serial computing, the operating frequency of less than 100M, the calculated rate is high, the level inside is very clear.)

（1）能够测试10HZ~10MHZ的方波信号； （2）电路输入的基准时钟为1HZ，要求测量值以8421BCD码形式输出； （3）系统有复位键； （4）采用分层次分模块的方法，用Verilog HDL进行设计，并对各个模块写出测试代码； （5）具体参照说明文档（包含源代码，仿真图，测试波形，详细的设计说明）(A square wave signal capable of testing 10HZ~10MHZ; (2) the reference clock input by the circuit is 1HZ, and the measured value is output in the form of 8421BCD code; (3) the system has a reset key; (4) adopt the method of layering sub sub module and design with Verilog HDL; (5) write test simulation program.)

该源代码是RS（31，19）码的完整编译码程序，采用的是VerilogHDL语言，包含了RS码的编码和译码，这蛋疼的东西花费好多时间(The source code is RS (31,19) code complete encoding and decoding procedures, and spend a lot of time using is VerilogHDL language contains the encoding and decoding of RS codes, this egg pain)

systemc实现的一个fifo，对想要学习systemc的同学很有帮助哦(A fifo systemc achieved, the students want to learn systemc helpful oh)

2FSK的matlab仿真，叠加了高斯白噪声(2FSK matlab simulation, superimposed on a Gaussian white noise)

说明：  stepper motor module on spartan 6 and 24MHz clock fequency

verilog ad9777 ad芯片的配置程序，SPI接口协议 16bit DA(Verilog ad9777 AD chip configuration program, SPI interface protocols for 16 bit DA)

vhdl编程语言电子书，英文的，有很多例子(VHDL programming language e-books, in English, there are many examples of)

有符号数的完整讲义和例子Verilog 2001(Signed Arithmetic in Verilog 2001, paper with examples)