This is a verilog file which is used as a decoder

VHDL硬件描述语言与数字逻辑电路设计,学习VHDL的好资料-VHDL hardware description language and digital logic circuit design, VHDL learning good information

用VHDL写的运动计时表程序，用Modelsim仿真已经通过，帖出来与大家分享。-write VHDL campaign time table program, Modelsim simulation has been passed, Tie up share with you.

RS 编码和解码Verilog Code, 实现了RS（544,514)的编码和译码；(-RS Coding and Decoding Verilog code，　implement RS（544,514))

vhdl编写的FPGA与DSP接口程序，在FPGA内分配了两块双BUFFER与DSP进行通信(vhdl prepared FPGA and DSP interface program, the FPGA within the allocated 2 pairs of BUFFER to communicate with the DSP)

cm12864液晶显示器的vhdl驱动代码，基于状态机的转换，实现显示功能。-descripe by the VHDL to drive the LCD cm12864,based on the FSM convertor,achieve the display function.

交通灯控制器，verilog，可控制两个方向各四盏灯的亮灭，并具有时间显示(traffic light controllor，by verilog)

高速流水的SDRAM控制器，最高速度可达速度在200M左右(high speed SDRAM controller)

设计一个8位有符号数字平方器。平方器将接收操作数B，一个8位有符号数。新兴市场；

说明：  采用vhdl语言编写的卷积编码（2.1.7），通过调试可直接下载使用(Convolution using vhdl language code (2.1.7) can be directly downloaded through the use of debugging)

morris mano basic vhdl code in ise