This is a verilog file which is used as a decoder

 ；建立一个录音机，用于录制和播放8位数字音频样本。实现了一个低通FIR滤波器模块，可以用作抗混叠和重构滤波器。

完整的TPC编译码VHDL程序，直接就可以运行(TPC encoder and decoder)

一些非常有用的程序，均经过调试，让大家一块共享。(Some very useful procedure, have been testing, so that everyone shared one.)

说明：  OFDM信号的发送与接收 ，需要自取。时域图，模糊图，削峰。(Sending and receiving of OFDM signal)

在quaritusII的开发环境下，verilog语言编写的m序列发生器代码，这种算法简短而有效，非常实用。(In quaritusII development environment, verilog language of m sequence generator code, this algorithm brief but effective, very practical.)

各类CRC效验码 有CRC8-8 CRC16-8 CRC32-8 CRC12-4 CRC-CCIT-8(CONTAIN CRC8-8 CRC16-8 CRC32-8 CRC12-4 CRC-CCIT-8 )

RS码的FPGA编码文件，QUARTUS工程(The RS codes FPGA encoded file, QUARTUS engineering)

基于FPGA控制的DDS波形发生器，可在Cyclone IV系列板子上使用，已经过仿真验证(Based FPGA control DDS waveform generator in Cyclone IV series board on use, has been simulation)

基于Verilog的串口通信源码 ，实现串口通信功能(Verilog source code based on serial communication)

完整的跑表设计，时，分，秒都显示，希望能对大家有用，谢啦(Complete stopwatch design, hours, minutes, seconds, show, hoping to be useful for everyone,)