先进先出

VHDL code of a counter Code VHDL d un compteur

说明：  VHDL BASED DATA COMPRESSION

altera DE1 SD_CARD带写入一个扇区功能的程序，已确认成功，下载直接运行就可以看效果-altera DE1 SD_CARD with a sector write function procedures, has confirmed the success of running can be downloaded directly watch the effect of

用于单片机的adc采集实验，经过降噪处理，结果精确(ADC acquisition experiment for single chip computer, after noise reduction processing, the result is accurate)

文档包括双线性插值算法和最近邻域算法的详细介绍，以及算法的相关计算。(Documentation includes bilinear interpolation algorithm and the nearest neighbor algorithm which is described in detail, as well as algorithms related calculations.)

protel fpga常用封装库1，非常难找的-protel fpga library a popular package is very difficult to find the

synopse sv培训lab，是学习systemverilog非常好的资料，放心下载。(synopsis sv training lab)

全部通过，是我的精心设计，完全满足初学者的要求。-all passed, I was carefully designed, fully meet the requirements of beginners.

本文详细介绍了我们的电气工程项目；

68013与FPGA的通信，包含了固件程序与verilog程序(68013 and FPGA communication, including firmware and verilog program)