基于DDS的移相信号发生器的设计

艾米电子的verilog HDL描述的DS18B20的程序(Amy verilog HDL description of the procedures DS18B20)

本实验教程选用Xilinx公司的产品X9572，与之配套的开发软件为ISE4.1i，可进行原理图的输入和VHDL硬件描述语言的输入，并且可利用Modelsim进行功能仿真和时序仿真。-In this study, selected Xilinx tutorial products X9572, with supporting the development of software for ISE4.1i, schematic can be input and VHDL hardware description language input, and can use Modelsim functional simulation and timing simulation.

这是本人设计的一个关于VME总线接口的FGPA程序，FPGA一边连接ARM LPC2294，一边连接VME总线，FPGA采用的XILINX公司的SPARTANII系列，程序包包含完整的工程文件-This is my design of a VME bus interface on the FGPA procedures, FPGA side of the connection ARM LPC2294, while connecting VME bus, FPGA using the XILINX Inc. SPARTANII series, the package contains a complete project file

FFT with FIR created by students in univercity

VHDL 波形防止抖动程序,学习试验材料(VHDL prevent jitter waveform procedures, the pilot study materials)

FPGA学习的非常好的资料，希望广大朋友都可以学习学习啊(FPGA to learn very good information, I hope our friends can learn ah)

一个SDH中最基本传输模块STM-1的帧头检测器，verilog编程实现-A basic SDH transmission module STM-1 Header detector, verilog Programming

4X4电子密码锁的中央控制系统。控制6位输入。-4x4 electronic locks central control system. Six input control.

层合板的刚度的计算和验算，包括拉伸刚度A、弯曲刚度D以及耦合刚度B。 首先要给定层合板的各个参数，具体有：层合板的层数N；各单层的弹性常数E1、E2、 、G12；各单层对应的厚度；各单层对应的主方向夹角 。(The stiffness of laminated plates is calculated and checked, including tensile stiffness, A, flexural stiffness, D and coupling stiffness B. First of all, it is necessary to give the parameters of laminated plates, such as the number of plies N, the elastic constants of each layer, E1, E2, and G12, the thickness of each monolayer, and the angle of the main direction corresponding to each single layer.)

说明：  实现了QPSK的调制，使用了ise自带的dds的IP核(QPSK is modulated and the IP core of DDS is used in ise.)