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基于fpga和xinlinx ise的音乐播放器vhdl程序,希望对你有所帮助!...
基于fpga和xinlinx ise的音乐播放器vhdl程序,希望对你有所帮助!-and xinlinx ideally music player VHDL process, and I hope to help you!
- 2023-02-07 05:35:03下载
- 积分:1
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Verilog--image-sample
基于Verilog的图像采集、处理和存储程序,初学者参考,高手绕道。(Verilog-based image acquisition, processing and storage procedures, beginners reference, master bypass.)
- 2021-04-16 11:48:54下载
- 积分:1
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uart
说明: fpga串口收发完整程序,Verilog语言。(FPGA configuration PLL complete program, Verilog language.)
- 2020-06-20 17:00:02下载
- 积分:1
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spi_slave
FPGA实现SPI接口的从机功能,接收和发送全双工运行,接收到的数据以八位LED灯显示(FPGA to achieve the SPI interface the machine function, receive and send full-duplex operation, the received data to eight LED lights)
- 2021-01-07 19:28:52下载
- 积分:1
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完成一个FIR数字滤波器的设计。要求:
1、 基于直接型和分布式两种算法。
2、 输入数据宽度为8位,输出数据宽度为16位。
3、 滤波器的阶数为1...
完成一个FIR数字滤波器的设计。要求:
1、 基于直接型和分布式两种算法。
2、 输入数据宽度为8位,输出数据宽度为16位。
3、 滤波器的阶数为16阶,抽头系数分别为h[0]=h[15]=0000,h[1]=h[14]=0065,h[2]=h[13]=018F,h[3]=h[12]=035A,h[4]=h[11]=0579,h[5]=h[10]=078E,h[6]=h[9]=0935,h[7]=h[8]=0A1F。
-Completion of a FIR digital filter design. Requirements: one, based on the direct type and distributed two algorithms. 2, input data width of 8, the output data width of 16. 3, filter order of 16 bands, tap coefficients for h [0] = h [15] = 0000, h [1] = h [14] = 0065, h [2] = h [13] = 018F , h [3] = h [12] = 035A, h [4] = h [11] = 0579, h [5] = h [10] = 078E, h [6] = h [9] = 0935, h [7] = h [8] = 0A1F.
- 2022-10-24 20:10:03下载
- 积分:1
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GPS
通过UART在FPGA数码管上显示经纬度坐标的代码(By UART displayed on FPGA digital latitude and longitude coordinates of the code)
- 2015-06-22 17:14:37下载
- 积分:1
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fulladd
this files in Quartus2 are fulladder
- 2016-05-17 16:38:42下载
- 积分:1
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fpga 基于FPGA的mif文件创建与使用
fpga 基于FPGA的mif文件创建与使用-fpga FPGA-based mif file creation and use of
- 2022-02-06 23:23:12下载
- 积分:1
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PAL_VGA
基于FPGA的PAL_VGA转换器的实现.pdf(FPGA-based PAL_VGA converter implementation)
- 2009-03-17 14:13:36下载
- 积分:1
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hex_counter-2014-10-15
hex_counter
old project, please let me know if need any help
- 2014-12-03 02:21:05下载
- 积分:1