实现

伪随机m序列产生的VHDL语言程序- program in VHDL language for generating pseudo-random m sequence

a manual for design implementation of fpga and ASIC using verilog

基于Verilog HDL的SDRAM控制器。 实验条件： 工具：Quartus II 6.0 ,SignalTap II FPGA：Altera Cyclone EP1C12Q240C8N SDRAM：HY57V283220T-6(SDRAM controller based on Verilog HDL. Experimental conditions: Tools: Quartus II 6.0, SignalTap II FPGA: Altera Cyclone EP1C12Q240C8N SDRAM: HY57V283220T-6)

pid程序,新学者，使用FPGA学习，希望大家一起学习

应用布莱克曼窗实现FIR滤波器，并绘制相应波形图案(Application Blackman window FIR filter, and draw the corresponding waveform pattern)

此论文想详细阐明了用FPGA做硬件处理，集成SOPC功能实现MVB通讯协议的解决方案，可以运行在alter fpga上面。(This paper expounds in detail the processing to do with FPGA hardware, integrated solutions for SOPC function of the realization of MVB communication protocol, can run in alter FPGA above.)

适用于FPGA初学者,一个流水灯的程序,用VERILOG语言写的.-Applicable to FPGA beginners, a procedure for light water, using the Verilog language.

SOPC系统的I2C代码 直接可用，可作为ＩＰ核用到自己的系统中(SOPC system I2C code directly available, can be used as an IP core in your system)

verilog实现的“六进制约翰逊计数器”。(verilog implementation of the " six hexadecimal Johnson counters." )

获取主机CPU信息，VS2008编译通过，含详细说明(Get information on the host CPU, VS2008 compiler, containing detailed instructions)