multiplication

LDPC的短码，码长为40速率为0.5的LDPC码的设计，用的是QC矩阵，压缩文件为原码部分，工程太大传不上去。(LDPC short code, a code length of 40 rate of 0.5 LDPC code design, using a QC matrix, the compressed file is part of the original code, do not pass up the works too.)

The description header can be found in signal_processing_library.h.

xilinx edk 9.2 破解器/注册机(xilinx edk 9.2 crack)

VEROLOG的重要PPT资料,对初学者非常有益处-PPT important VEROLOG information is very useful for beginners

DDS_AD9854_for FPGA ,FPGA开发下的verilog源代码，信号发生器(DDS_AD9854_for FPGA, verilog source code, signal generator.)

跑马灯 简单实用很适合初学者 希望对大家有用-Marquee is simple and practical very suitable for beginners want to be useful to everyone

64点FFT代码 基4算法 Verilog(64-point FFT code radix-4 algorithm Verilog)

非常好的EPM570(CPLD)学习程序源码,适合初学者,能让其快速入门(Very good EPM570 (CPLD) learning program source code, suitable for beginners, allowing its Quick Start)

verilog编写的计算百分比模块(Verilog prepared by calculating the percentage module)

资源描述这个包提供了一个UDP／IP核心架构的一个开源的VHDL实现和PC机与FPGA接口传输基础C类型（字符、16 / 32 / 64位的整数，浮点数和双打）。