罗密欧与朱丽叶

statemachine project for my school

AUDIO音频模块AN831的录音及播放FPGA代码，测试通过(AUDIO audio module AN831 recording and playback of FPGA code, the test passed)

该程序描述并且模拟和实现了了一个摩尔有限状态机的功能和作用(The program describes the simulation and the function and role of a mole finite state machine)

用FPGA中的三速以太网来实现UDP通信，功能强大(With a triple-speed Ethernet in the FPGA to implement UDP communication, powerful)

the interface design of pcie based on FPGA

多功能数字钟，在quartusII软件平台上实现的verilog源代码。大家试试看。(Multifunctional digital clock in quartusII software platform to achieve the verilog source code. We try.)

xilinx ise开发环境中fft IP核调用，仿真(Xilinx ise development environment FFT IP core call, simulation)

说明：  基于FPGA的QPSK系统仿真及验证，硬件部分。(Simulation and verification of QPSK system based on FPGA)

说明：  通过按键输入学号，并循环显示： 电路功能描述：通过Ego1上的按键输入自己的学号（8位10进制数），并存储在32位的寄存器中；8位10进制数输入完成后，实现滚动显示效果。(Enter the student number by pressing the key, and display it in a cycle: Circuit function description: input one's own student number (8-digit decimal number) through the key on ego1, and store it in 32-bit register; after the completion of 8-digit decimal number input, the scrolling display effect is realized.)

使用Verilog编写的ad9826的控制模块(the module of ad9826 with verilog)