《CPLDFPGA verilog DA0832调控

基于NiosII系统的可以在DE2-115板子上运行的吞食蛇游戏！（可以使用RS2键盘进行控制）(DE2-115 board NiosII system swallowed snake game! , (RS2 keyboard control))

0到255任意整数半整数分频Verilog HDL.rar-0-255 arbitrary integer half-integer frequency division Verilog HDL.rar

goertzel stuff. contains matlab files and different explanations of how it is used for DTMF decoding.

使用VHDL进行分频器设计，主要是一些分频的东西，整数分频，小数分频，奇次分频和偶次分频-Divider using VHDL to design, mainly because some sub-band stuff, integer divider, fractional-N, odd and even sub-sub-sub-sub-band frequency

用verilog写的，基于查表法实现的LOG10运算器，在Altera FPGA中应用。(It is a verilog design of LOG10 calculation unit, which is based on LUT arithmatic. And it is applicated in Altera FPGA.)

平坦度检测中的高度检测算法，使用ISE开发环境，语言为VHDL，平台是XC3S4-a vhdl_program used for flat detect

一个完整的设计DE2_project,希望对大家有所帮助，谢谢ok-A complete design DE2_project, everyone would like to be helpful, thank you ok

按键控制LED流水灯；按键1按下前8个灯从左到右依次点亮，按键2按下中间前8个灯从左到右依次点亮，按键3按下所有灯全亮(Water control button LED lights sequentially lit buttons the eight lights left to right 1 Press button 2 press from left to right is lit in the middle eight lights, key 3 Press All full bright light)

存储器DDR3在Xlinix平台上的设计教程和综合应用(Design course and comprehensive application of memory DDR3 on Xlinix platform)

512×8bid的FIFO 含工程文件，基于QUARTUs-512 × 8bid the FIFO with the project document, based on the QUARTUsII