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XilinxFpgaDesignAndTest
Xilinx fpga 设计培训中文教程,比较好的学习FPGA入门的教程(Xilinx fpga design training for Chinese curricula, better start learning FPGA Tutorial)
- 2020-08-13 15:58:30下载
- 积分:1
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程序
说明: 传感器是一种检测装置,能感受到被测量的信息,并能将感受到的信息,按一定规律变换成为电信号或其他所需形式的信息输出,以满足信息的传输、处理、存储、显示、记录和控制等要求(Sensor is a kind of detection device, which can sense the measured information and transform it into electrical signal or other required information output according to certain rules to meet the requirements of information transmission, processing, storage, display, recording and control.)
- 2020-06-18 22:00:01下载
- 积分:1
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sobel
在FPGA中,采用verilog HDL语言实现图像处理算法sobel,仿真实验通过(In the FPGA using verilog HDL language image processing algorithms sobel, simulation experiment)
- 2021-01-15 20:58:46下载
- 积分:1
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mig_v7_4
说明: 针对XILINX 7系列FPGA 中MTG的驱动代码,代码的接口部分主要分为两个部分,一是控制DDR的DMA大小,选择读写,每次DMA的起始地址;二数据部分为AXIS。
已经在多个工程中使用。(For the driver code of MTG in XILINX 7 series FPGA, the interface part of the code is mainly divided into two parts, one is to control the DMA size of DDR, select read and write, the starting address of each DMA; the second data part is AXIS.
It has been used in multiple projects.)
- 2020-05-09 16:05:17下载
- 积分:1
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PWM
使用VerilogHDL语言加上IP核产生PWM调制波,占空比和频率可调。(The PWM modulation wave, duty cycle and frequency can be adjusted by using VerilogHDL language and IP kernel..)
- 2015-06-05 10:29:28下载
- 积分:1
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conv_encoder
TD-LTE中(3.1.7)咬尾卷积码编码器verilog代码(Tail-biting convolutional code encoder verilog code)
- 2014-04-09 11:12:43下载
- 积分:1
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add_noisem
把指定的噪声叠加到信号上去.有标准噪声库NOISEX-92,其中带有白噪声、办公室噪声、工厂噪声、汽车噪声、坦克噪声等等,在信号处理中往往需要把库中的噪声叠加到信号中去,而噪声的采样频率与纯信号的采样频率往往不一致,需要采样频率的校准。
(The specified noise superimposed to the signal up. Standard noise library NOISEX-92, with white noise, office noise, factory noise, car noise, tank noise in the signal processing often requires noise to be superimposed in the library The signal to noise of the sampling frequency and pure signal sampling frequency is often inconsistent sampling frequency of calibration.)
- 2012-08-10 14:18:33下载
- 积分:1
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基于FPGA的DDS程序代码
基于FPGA的DDS程序代码,实现的功能强大可以输正弦波,三角波,方波等波形,并且频率可以调节。实现对应的功能强大。(FPGA-based DDS program code can achieve powerful output sine wave, triangle wave, square wave waveform and frequency can be adjusted. Implement corresponding powerful.)
- 2015-09-15 23:09:00下载
- 积分:1
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802.1as
802.1as gptp标准包解析verilog模块。用于实现EAVB协议的重要部分。(802.1as gptp verilog module, part of EAVB procotol)
- 2017-02-07 15:16:39下载
- 积分:1
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PS2-Verilog程序
这个程序详细的介绍了PS串口的编写,以及键盘的消抖。并显示在数码管上。经仿真验证,程序能够很好的完成设计目的。
- 2023-08-16 07:30:04下载
- 积分:1