第六部分 锁相环PLL例程

数字示波器实验，利用AD、DA和VGA三个外设来实现简易示波器，DA外设发送正弦波给AD外设，AD外设解析成数字信号将数据送给VGA外设进行显示。在VGA上可以看到DA外设发送的波形、波形频率和波形峰峰值。(In the experiment of digital oscilloscope, AD, DA and VGA are used to realize simple oscilloscope. DA peripheral transmits sine wave to AD peripheral. AD peripheral resolves into digital signal and sends data to VGA peripheral for display. The waveform, waveform frequency and peak value of DA peripheral can be seen on VGA.)

RS通用编码器，根据定义的参数以及本原多项式就能实现各种体制的编码，Verilog实现，还附带有限域乘法的实现，代码清晰，精炼

绝对可用，仿照了很多代码修改而来，理解简单，只要细细阅读绝对明白，而且以后可以移植到其他程序里。顶端程序看似复杂，其实简单。module vga_module (         CLK_50M, RSTn,     VGA_HS,  VGA_VS,     VGA_BLANKn,      DAC_CLK,     VGA_R, VGA_G, VGA_B 请点击左侧文件开始预览 ！预览只提供20%的代码片段，完整代码需下载后查看 加载中 侵权举报

ahb总线Verilog代码及Verilog仿真文件(ahb bus Verilog code and Verilog simulation code)

带DDR3内存条，HDMI，PCIE，SD，usb，i2c,spi,uart接口

这是一个基于Quartus2 开发环境的4输入加法器( 4adder basic on Quartus2)

Based on SVPWM three-level inverter matlab simulation, It describes the application of load forecasting, EULER numerical analysis method.

新版 小米抢购器 -源码 已经测试，代码很有用，已经抢了好几个小米3了，希望对大家有用(The new millet to snap up- source Have test, the code is useful, has robbed several millet 3, hope useful for everyone)

说明：  经典的OV5642的verilog驱动程序(Verilog Driver of Classic OV5642)

本文分析了当前国内外出租车计费系统的基本组成和工作原理及主要的两种设计方式:基于单片机的设计方式和基于FPGA的设计方式；并对这两种实现方式的优点和缺点进行分析，比较后确定本系统的方案：基于FPGA的出租车计费系统的设计。(This paper analyzes the current taxi charging system at home and abroad, working principle and basic components of two major design approach: the design methods based on single chip FPGA-based design approach and the two implementations to analyze the strengths and weaknesses, After comparing the program to determine the system: FPGA-based taxi billing system.)