项目： 电梯控制器

SPI经典ip核 可以直接用于工程的开发和利用-err

Xilinx ISE 8.2i的license-Xilinx ISE 8.2i s license

说明：  关于计时器 verilog语言，采用arm架构的m3，可以直接应用于soc(About timer verilog language, USES the arm architecture of m3, can be directly applied to soc)

用NIOSII生成的VGA显示程序,可以在显示器上显示通讯内容

本实验是用LCD12864显示英文 显示 Our FPGA EDA NIOS II SOPC FPGA(This experiment is shown in English with LCD12864 display Our FPGA EDA NIOS II SOPC FPGA)

vhdl测试程序，用于初雪者熟悉hdl的具体语法应用。比较简单了。(VHDL test procedure for the First Snow hdl who are familiar with the application of specific syntax. A relatively simple.)

this program get 20 point from user and draw functions.

掌握SDRAM数据读写、刷新、初始化以及FPGA串口收发时序，熟练FIFO IP核的生成和调用。(Master SDRAM data read and write, refresh, initialization and the timing of sending and receiving of the serial port of the FPGA, skilled in the generation and invocation of the FIFO IP core.)

Simple relay trigger

非常优秀的国外VHDL设计教程，可进行MODELSIM模拟等操作-Excellent foreign VHDL design tutorial, it can conduct operations such as ModelSim Simulation