基于Verilog的FFT核

说明：  Verilog代码实现四分屏，在Vivado平台下实现的，可仿真(Verilog code realizes four screens, which can be simulated under vivado platform)

Altera 基础篇公司书籍源码-Altera Corporation based on chapter books-source

该部分的主要功能是完成基于FPGA的polar码编码。(The main function of this part is to complete the FPGA-based polar code coding.)

说明：  verilog讲义 卡内基梅陇大学verilog课程讲义-unlocked 卡内基梅陇大学verilog课程讲义-unlocked(Verilog Course Lectures at Carnegie Mellon, University Verilog Course Lectures at Carnegie Mellon University Verilog Course Lectures at Carnegie Mellon University)

用VHDL语言实现的ARM处理器的标准内核的源代码程序，可在重用-use of the VHDL standard ARM processor core source code procedures, the reuse

VHDL小程序（本人的一些小成绩哦，希望对大家有帮助）-VHDL small programs (some of my small achievements Oh, we want to help)

USB245I的基于FPGA的VHDL语言的驱动程序,应该有用-USB245I based FPGA VHDL of the driver, should useful

使用verilog语言，滚动显示“verilog”字符串程序代码及相关说明(Using verilog language, scrolling display " verilog" string code and instructions)

简单流水线CPU，使用 verilog实现，实现一条指令的整个流程(Implementation of Simple Pipeline CPU Verilog)

利用分频可以产生一系列脉冲，根据输入脉冲的不同决定你得到的一系列脉冲频率-The use of sub-band can produce a series of pulses, according to input pulse of different decisions you have a series of pulse frequency