EDA设计 交通灯

VHDL实例,有近百个实例,都是可以在quarturs 上进行仿真的,大部分都可以通过,对初学者是一非常不错的-VHDL example, there are nearly a hundred examples, can be carried out in quarturs simulation, most of them can pass, for beginners is a very good

本例源代码文件由用户按照书中的操作步骤自己生成，“Example-2-1Project_Navigator_Demo源代码”目录下为源代码的参考文件。“Example-2-1Project_Navigator_Democounter”目录下为完整的工程，包括源代码文件、综合与实现的结果文件、ISE工程文件等，可以使用ISE工程管理器打开工程，供读者参考(In this case the source code files by the user in accordance with the steps the book itself is generated, "Example-2-1 Project_Navigator_Demo source" directory as the source code reference document. "Example-2-1 Project_Navigator_Demo counter" directory for a complete project, including source code files, integrated with the realization of the outcome document, ISE project file, etc. You can use ISE Project Manager, open the project for the reader is referred to)

spi-slave通信的vhdl实现及其仿真(VHDL implementation of spi-slave communication)

JTAG design verilog code.

FFT的VHDL源代码-fft vhdl source code

Avt_S6LX9_MicroBoard_UCF_110127，有关xilinx spartan6开发板的相关参考设计。(Adding Custom IP to an Embedded System, the relevant reference on xilinx design.)

CPLD的VerilogHDL总线代码,在EPM7128SLC84-10+Quartus4平台上运行通过.-CPLD bus Verilog HDL code, the PLD-10 Quartus4 platform to run through.

train controler by verilog

这是用verilogHDL写的m序列发生器，简单易用，代码非常易读(It is written verilogHDL m sequence generator, easy to use, the code is very easy to read)

verilog实现ALU的源代码，并提供了一个详细的测试平台！-achieve ALU Verilog source code, and provide a detailed test platform!