组合电路的设计8位加法器设计(ADD8.vhd)

74ls161 基于verilog语言的实现 源程序在压缩包的hdl文件夹中(74ls161 language based on the realization of verilog source package in compressed folder hdl)

编程规范是重中之重，带你书写良好的变成习惯(It is used to measure noise and detect road noise pollution. It is accurate and has good effect.)

Testbench 不仅要产生激励也就是输入，还要验证响应也就是输出。当然也可以只产生 激励，然后通过波形窗口通过人工的方法去验证波形，这种方法只能适用于小规模的设计(The Testbench not only to generate incentives to input, verify that the response is output. Of course, can only produce Incentive, and then the waveform by the waveform window by artificial means to verify, this method is only applicable to small-scale design)

FPGA实现串口发送 Verilog 语言(Serial reception FPGA Verilog language.)

利用FPGA实现SDRAM的读写操作，通过硬件测试。(FPGA implementation using SDRAM to read and write operation, hardware testing.)

PCIe数据链路层的协议详解，对做PCIe接口有非常重要的指导价值。(PCIe data link layer protocol detailed, do PCIe interface very important value.)

自动售货机，根据所要的东西，自动收费，并进行找零(Vending machine, according to what you want to automatically charge and conduct Keep the change)

至于FSK调制原理就不多说了，这里做的一个实验是二进制频移键控。发送一组码元，通过响应的键控电路监测是发1还是发0然后选择频率控制正余弦电路波形。-see

eda技术与vhdl课件,很经典的学习课件-VHDL EDA technology and courseware, it is a classic learning courseware

运用VHDL语言编写的交通灯实现程序,能模拟十字路口的交通灯控制(VHDL language using traffic lights to achieve program can simulate the traffic light controlled crossroads)