组合电路的设计8位加法器设计(ADD8.vhd)

01 线性调频信号的卷积功能测试（匹配） 02 LFM一维距离像 03 MATLAB联合FPGA仿真输入/输出功能测试 04 解速度模糊 05 扩展目标检测(01 LFM Test function of "conv" 02 LFM Range 03 MATLAB and FPGA 04 resovle speed resolution 05 Extended moving target)

使用verilog实现全数字16QAM调制器，载波频率1MHZ，数据比特流的速率为100Kbps,(the modulation of 16QAM based on FPGA)

QPSK在赖斯信道下的模拟仿真，包括K=6和K=10下的情况(QPSK in, Laisi Xin Road, under the simulation, including the case of K = 6 and K = 10 under)

VHDL Project for beginners. Electronic dice game. Perfect for Spartan devices.

CH341A的I2C接口Labview all vision (CH341A I2C Labview)

verilog coding for butterworth filter with cut off frequency with 500hz

结合截图，quartus2与ModelSim的联调的详细操作步凑，使初学者迅速上手-Combination of shots, quartus2 with the ModelSim FBI put together a detailed step-by-step operation, so that beginners get started quickly

OFDM通信系统设计与仿真(shuoshilunwen)(OFDM System Design and Simulation )

本文件时VHDL的各种编写规范，有助于开发者在平时养成好的编码习惯(This document, the various write VHDL specification, helps developers to develop good coding habits in peacetime)

自己编写的AD7667的数据采集程序，因为之前没用过，首次写！