循环冗余校验码(试验报告)

帧激励产生器，用于VMM仿真中生成所需要帧以供测试所用(the use for test)

基于FPGA的交通灯的设计 有Verilog HDL 源码、仿真图与引脚配置图，已下载实现 -FPGA-based design of traffic lights have Verilog HDL source code, simulation map with pin configuration map has been downloaded realize

基于DE2开发板的VGA显示模块，仅供大家参考(DE2 development board based on the VGA display module, for your reference)

一种计算高阶矩阵奇异值分解的FPGA实现方法。(A high-end computing matrix singular value decomposition of the FPGA realization method.)

UART program for fun(UART)

说明：  risc 8 by coonan compatible with PIC16C57

用VHDL语言仿真歌曲刘德华的《月老》 -Simulation using VHDL language songs Andy Lau

code for fft non synthesisable in xilinx ise

关于I2C总线协议的verilog代码，里面包括了3个verilog代码(I2C bus protocol verilog code, which includes three verilog code)

BCH3.c,提供m<21以下的所有码长的BCH编解码模块。以供大家参考。谢谢(BCH encoder&decoder GF(2^m) m<21)