9. For the key to enter a password lock, assuming that reset after the seven lam...

说明：  Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART controller was implemented using VHDL 93 and is applicable to any FPGA. Simple UART for FPGA requires: 1 start bit, 8 data bits, 1 stop bit! The UART controller was simulated and tested in hardware.

该程序使用Verilog语言产生LFM信号(The program uses Verilog language to generate LFM signals.)

可以用于按键去抖动的电路应用，采用vhdl编写-Button can be used to jitter circuit applications, the preparation of the use of VHDL

基于vhdl语言的15位gold序列的设计的开端一部分程序(Vhdl language based on sequences of the 15 gold as part of the beginning of the design process)

DE2将连接到LCD布局上，为Terasic off技术公司附上系统代码

VHDL Project for beginners. Electronic dice game. Perfect for Spartan devices.

文件用于驱动TFT屏，分辨率800*400，平台为quartus13，芯片为cycloneIV(The file is used to drive the TFT screen with a resolution of 800*400. The platform is quartus 13 and the chip is cyclone IV.)

良好的Coding Style能减少Bug，减少锁存器出现的可能以及其他隐藏逻辑错误，也有助于减小芯片面积或所用资源(Good Coding Style can reduce Bug, reduce the possibility of latches and other hidden logic errors, and also help to reduce chip area or resources used.)

8051MCU在FPGA上实现的源代码，用VHDL语言编写-8051MCU in the FPGA to achieve the source code, using VHDL language

SPI读写AD9361，通过串口回读关键寄存器读写是否正确。(SPI reads and writes AD9361, reads and writes the key registers correctly through the serial port.)