9. For the key to enter a password lock, assuming that reset after the seven lam...

I2C 串口通讯Xilinx项目源码 拷贝到硬盘，用ISE打开工程文件即可。-I2C Serial Communication Xilinx source project are copied to the hard drive, using ISE project file can be opened.

关于XILINX FPGA 内部 中文培训教材-XILINX FPGA on internal training materials in Chinese

uart 收发器 verilog 代码，实现自收发功能 sys clk = 25m, baud 9600 停止位1， 无校验位； 代码实现了串口自收发功能，及把从 PC 收到的内容都发送会 PC, 其他波特率，自行修改代码即可，在 alter 的FPGA 上调试通过； (verilog code uart transceiver to achieve self-transceiver function sys clk = 25m, baud 9600 1 stop bit, no parity code from the transceiver features a serial port, and the contents received from the PC will send the PC, another Potter rate, self-modifying code can, in the alter of the FPGA, debugging through )

用fpga驱动lcd的原代码，是用vhdl语言实现的-drive lcd by fpga，the source program is written by vhdl

hdlc协议的封装与解析，fsc校验，完整的例程代码(Decode and Encode an HDLC packet ，using FCS16 calculation)

VHDL Vendingmachine source

本文为verilog的源代码-In this paper, the source code for Verilog

fpga控制led灯的闪烁，内容简单，希望对初学者有用.(fpga control led lights flashing, the content is simple, I hope useful. . .)

四阶数字滤波器 用不同的算法设计数字滤波器，并且有详细的是用方法(Fourth-order digital filter design with a different digital filter algorithms and a detailed method is)

XAPP134 SDRAM VHDL design file