曼彻斯特编解码 Xilinx提供的VHDL的源代码

这是一个基于FPGA实现的GPS的程序，保证可以用-This is an FPGA-based GPS program to ensure that you can use ... ...

找到这本书的完整版了。呵呵，贴出来和大家共享。这是本好书，我买了一本作为Verilog的参考书。这本书语法部分集中，便于查阅，此外讲了很多实用的设计思想。最重要的是本书薄，可以完整看完。强烈推荐。 （如果只是查阅，电子版就可以，如要完整学习，建议还是买纸质版的）(Find the full version of this book. I posted and share. This is a good book, I bought a reference book as Verilog. Syntax in this book section focuses on ease of reference, in addition to speaking a lot of useful design ideas. The most important thing is that the book is thin, you can complete reading. Highly recommended. (If you only access the electronic version to complete learning, suggestions or to buy the paper version))

HDL example source code 1/5 dff_as

sin波形发生图形，应用智能老师款到即发了快速打击 (sin waveform generation graphics application smart teacher paragraph to that made a rapid strike)

能够完美产生数字地面电视（DTMB）的信源的程序。帧头模式为模式一。信道可选择，信号加入频偏，延时，后经滤波器后输出。(Able to produce perfect digital terrestrial television (DTMB) of the source program. Mode is the mode a header. Channels to choose from, the signal adding offset, delay, after the filter output.)

用verilog写的简单的CPU，有详细注释(Use verilog to write a simple CPU, with detailed notes)

一路24位计数器,cpu可直接读写计数器的计数值.-All the way 24-bit counters, cpu can be directly read and write the total value counters.

在开发板EGO1上实现赛车游戏,语言为verilog，内含bits文件(racing game in verilog)

主要介绍，I2C总线主设备发送数据给从设备，代码实现是用Verilog语言实现的，对硬件设计者有很大好处(Introduces, I2C bus master to send data to the slave device, code is implemented in Verilog language, the hardware designer of great benefit)

执行 256 点， 基数 4 IFFT 算法，提出了一种高速和 16 位复杂 IFFT。通过 使用固定的几何寻址模式，管道设计和块浮点 结构，数据具有更高的精度和动态范围。建议 本文分析了逻辑大小、 面积、 功耗的体系结构 使用 Xilinx 8.2。