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aurora_IP
Aurora协议是一款高带宽、低成本、可扩展、框架简洁、适合点对点串行数据传输的协议。(Aurora protocol is a high-bandwidth, low-cost, scalable, simple framework for point to point serial data transfer protocol.)
- 2017-03-10 17:16:22下载
- 积分:1
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isjtc
Use serial programming examples matlab GUI implementation, Independent component analysis for image processing, Realize image watermarking, de-noising, plus noise and other functions.
- 2017-08-14 17:01:39下载
- 积分:1
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16 点药材 4 FFT
16 点药材 4 FFT 与真正的价值。这被设计基于 Arduino 板和任何泰文 8 位微控制器创建的 c + + 代码。
- 2022-07-10 21:06:50下载
- 积分:1
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dot_product
实现矩阵相乘,即点积运算,为VERILOG语言。可以根据自己的需要改变维数,采用了流水线的结构(Achieve matrix multiplication, ie dot product operations, for VERILOG language. You can change the dimension according to their needs, using a pipeline structure)
- 2015-01-27 10:52:52下载
- 积分:1
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这是我自己编写的三分频,也就是奇数分频,占空比为1:1,当然如果需要其它奇数分频,只要将程序里面的N和counter修改即可...
这是我自己编写的三分频,也就是奇数分频,占空比为1:1,当然如果需要其它奇数分频,只要将程序里面的N和counter修改即可-This was my third prepared by the frequency, which is odd hours, frequency and duty ratio of 1:1. Of course, if the needs of other odd hours, frequency, as long as the proceedings inside the N and counter can be amended
- 2022-10-27 10:05:04下载
- 积分:1
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Verilog prepared practical multi
verilog编写实用多功能电子表-Verilog prepared practical multi-function electronic Table
- 2022-04-23 06:46:24下载
- 积分:1
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highpass
高通滤波器的仿真(由matlab和simulink两种方法实现)源文件以及图片示例(Simulation of the high-pass filter (implemented by the two methods matlab and simulink) source files as well as images example)
- 2013-03-13 18:35:25下载
- 积分:1
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GIF图像查看器的VHDL代码
vhdl code for GIF Image Viewer
- 2023-05-09 12:40:03下载
- 积分:1
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使用Veriolog hdl 编写手机屏测试程序.
使用Veriolog hdl 编写手机屏测试程序.-Veriolog hdl prepared to use cell phone screen test.
- 2023-04-25 00:20:03下载
- 积分:1
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pci144_vhdl
PCI vhdl for Fpga designer to design PCI IP
- 2007-12-23 20:58:15下载
- 积分:1