-
quartus-mult
mult,在quartusII中,以模块输入形式,仿真乘法器mult,得到时序图和功能图(a simulation example of mult)
- 2012-10-17 14:22:11下载
- 积分:1
-
CPLD_DEMO_OK
可以给VHDL初学者看的实例,全部经过验证(VHDL beginners can see examples of all the proven)
- 2011-01-12 21:09:45下载
- 积分:1
-
dianziqin
运用quartus 软件模拟的电子琴,实现按键出现不同音调的音乐。(Quartus software simulation using keyboard, keys appear to achieve different tones of music.)
- 2013-07-03 14:57:05下载
- 积分:1
-
frame_syn
通信系统中数据的传输以帧为单位,在FPGA中帧头检测是通信系统中的一部分,该程序实现了FPGA中帧头的检测。(Transmission of data in a communication system in units of frames, the frame header is detected in the FPGA part of the communication system, the realization of the frame header is detected in the FPGA.)
- 2014-08-27 16:02:54下载
- 积分:1
-
BNN-PYNQ-master
在PYNQ-Z1上搭建二值神经网络(BNN)(Building two value neural network (BNN) on PYNQ-Z1)
- 2018-01-15 11:34:33下载
- 积分:1
-
rectifier
三相PWM整流,实现功率双向流动,可保持直流侧电压稳定(three-phase PWM rectifier, power can bidirectional flow ,can maintain the stable DC voltage)
- 2012-11-28 09:19:54下载
- 积分:1
-
RS_Encoder
具有16个校验位的RS编码器,在FPGA上实现。(With 16 RS encoder, the parity bit in the FPGA.)
- 2012-08-06 11:52:37下载
- 积分:1
-
PWM
飞思卡尔智能车芯片模块程序 MC9S12XS128 测试通过(freescale smart car for MC9S12XS128)
- 2011-08-04 10:34:33下载
- 积分:1
-
DDA_xy
说明: 运用Verilog 语言进行数字积分法,将X轴和Y轴进行插补运算。(Verilog language using digital integration method, the X axis and Y axis interpolation operations.)
- 2020-11-27 18:19:30下载
- 积分:1
-
基于ep4ce22的verilog串口程序
基于ep4ce22的verilog串口程序,可发送24bit,希望能给大家提供帮助。
- 2022-05-30 03:01:25下载
- 积分:1