State machine used to achieve code lock

ad9850函数发生器 MSP430单片机驱动程序 扫频 DDS(AD9850 DDS)

基于fpga的多功能数字时钟的实现，已经编译过了，绝对可行-fpga-baseed clock

IIC控制器 for Sopc Builder-IIC controller for Sopc Builder

VDHL的简单DEMO演示，有利于初学者学习使用(VDHL simple demo DEMO will help beginners learn to use)

说明：  fpga设计常用资料大全，包含常用的FPGA程序资料，对FPGA学习者有很大的帮助。(Encyclopedia of common information fpga design, FPGA that contains commonly used procedures for information on the FPGA is very useful to learners.)

基于FPGA的多电平载波移相SPWM方法实现(theCarried-Phase-shift SPWM method of Multi-Level converter based on FPGA)

说明：  彩色TFT液晶显示控制电路设计及其ASIC实现(TFT color LCD control circuit design and ASIC realization)

用VHDL写的计算器，实现加减功能以及ＶＧＡ显示功能，适合VHDL初学者使用。-VHDL write calculators, Modified functions and achieve VGA display, VHDL for beginners.

最近交互式电源技术，软交换、同步整流、频率固定(Alternating expressions Power technology recently、Softswitch, synchronous rectification, fixed frequency)

注意：是verilog语言写的 一bit的全加器，实现4位数的串行加法器，一个时钟能完成一次一bit的全加(Note: It is verilog language to write a bit full adder, to achieve four-digit serial adder, a clock can be completed once a bit full adder)