State machine used to achieve code lock

说明：  mojo v3 complete eagle schematic

Verilog code of SPI configurator for DAC AD7394 and AD7395

these are the source codes for the book " 100 power tips for FPGA designers"

系统数字逻辑电路设计方法以及示例的介绍,分析较好,有价值(System digital logic circuit design methods and introduce examples, analyze good and valuable)

用VHDL和verilog实现的四人抢答器-using VHDL and verilog realization of four Responder

用Verilog代码实现的乒乓操作，用Verilog代码实现的乒乓操作(Verilog pingpong)

基于BCH码的ECC纠错算法，可纠错2位错误码，供参考(Based on BCH code ECC error correction algorithm, two error codes can be corrected for reference.)

A simple preoteus based design to display the characters typed int the keyboard into LCD using UART of 8051.Plz make sure that TTL to RS232 is inserted in between the microcontroller and virtual terminal which is not shown in the design.

这个代码可以用来分裂振荡器的频率和产生 1 赫兹信号从 100 兆赫的 vhdl 语言使用的 Nexys 3 板。 这可以用作闹钟或数字时钟中的组件数秒。

针对传统CPM正交扩频系统实现复杂度高的问题，提出了一种基于预编码的CPM正交扩频系统。(Pre—encoded CPM orthogonal spread spectrum system)