H.264 Verilog Decoder

简单的以太网例程,verilog语言,vivado环境

基于FPGA的游戏实例，开发板为Xilinx的basys3，VGA显示(Basys3, VGA Display of Xilinx Development Board Based on Game Example of FPGA)

spartan6 里使用DDR3IP核，有教程以及源码(spartan6 with ddr3,source and tutorial)

数字滤波器包含IIR数字滤波器和FIR数字滤波器。本设计的工作主要是Labview软件部分，包括信号生成模块、滤波模块、显示模块的设计(IIR digital filter comprises a digital filter and FIR digital filters. The design work is mainly Labview software parts, including signal generation module, filter module, display module design)

说明：  sd卡的verilog代码，包含一些sd卡例程(SD card Verilog code, including some SD card routines)

说明：  用Verilog编写的简单的运算单元（ALU），可实现加、减、与、或、异或、非、左、右移等功能(Verilog prepared with simple arithmetic unit (ALU), can be add, subtract, and, or, exclusive-OR, non-, left, and other functions shifted to right)

说明：  matlab代码，利用Farrow结构设计分数延时滤波器，滤波器阶数和个数可分别进行设置，利用最大最小准则近似。(Matlab code, using Farrow structure design fractional delay filter, filter order and number can be set separately, using the maximum and minimum criterion approximation.)

说明：  verilog标准语法，还有很多的样例参考，学习的好资料。(Verilog standard grammar, there are many examples for reference, good learning materials.)

华为内部资料，华为FPGA全套资料，包括华为的专利设计(Internal information Huawei Huawei FPGA complete information, including Huawei' s patented design)

MPSK调制与解调VHDL程序源代码与仿真(MPSK modulation and demodulation process and VHDL source code and simulation)