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NN-using-FPGA
thesis about design and implementation neural network using FPGA
- 2013-12-29 16:23:52下载
- 积分:1
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verilog-digital-system-design-
verilog数字系统设计,一本很好的verilog学习的书籍,很适合初学者(verilog digital system design, a good verilog learning books, it is suitable for beginners)
- 2021-01-10 20:28:50下载
- 积分:1
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100_Power_Tips_for_FPGA_Designersi
fpga高手设计实战真经100则,最新的FPGA英文书籍,值得参考学习(100 Power Tips for FPGA Designers,The new FPGA English books, worth learning)
- 2013-12-06 19:40:43下载
- 积分:1
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ComChange-12061629
说明: 并行读写14路串口数据,数据被写入FIFO,在收到读写信号后,SPI发送数据出去(Parallel read and write 14 serial port data, SPI send data)
- 2019-03-13 01:38:44下载
- 积分:1
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uart
fpga串口收发完整程序,Verilog语言。(FPGA configuration PLL complete program, Verilog language.)
- 2020-06-20 17:00:02下载
- 积分:1
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SPI_DAC
使用VHDL语言实现了FPGA与DAC5688进行SPI通信更改寄存器值(The FPGA using VHDL language with the DAC5688 SPI communication to change the register value)
- 2011-10-23 21:14:45下载
- 积分:1
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alu2
verilog alu 8bit for engineers
- 2011-05-26 11:32:21下载
- 积分:1
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sqrt_pipeline
说明: Matlab - to hdl code for square root
- 2020-06-17 12:20:02下载
- 积分:1
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VHDL语言,设计一个在DE2平台的8个七段数码管上循环显示HELLO的程序
VHDL语言,设计一个在DE2平台的8个七段数码管上循环显示HELL0的程序,采用按键控制循环的速度,慢速循环时间间隔为1S,快速循环时间间隔为200ms。(VHDL language, design a platform in the DE2 8 segment digital tube display HELL0 program cycle, the speed control loop using keys, slow cycle time interval for the 1S, fast cycle time interval is 200ms.)
- 2020-07-08 20:28:56下载
- 积分:1
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sim
csapp 第二版 体系结构实验 答案 第三个部分能跑58分(the second edition csapp architecture experiment the third part of the answer can run 58 minutes)
- 2013-05-20 10:28:00下载
- 积分:1