AHB 仲裁

LCD1602显示源码，verilog编写，已在版上测试过！可输入字符串显示！！！！！！！！

verilog语言编写的farrow滤波器的实现过程，供大家参考，谢谢。(Verilog language Farrow filter implementation process for your reference)

简易函数发生器，能产生正弦波，三角波，梯形波，方波，并且可调频率和幅度值。(Simple function generator can produce sine, triangle wave, trapezoidal wave, square wave, and the adjustable frequency and amplitude values.)

本程序是用verilog 编写的模块，用来在lcd1602上显示用tlc549采样的电压值(This program is written in verilog module, used in lcd1602 display with tlc549 sampled voltage value)

1.設計一計數器，計算輸入信號（pulse）的高準位有多少個時脈週期，並將計數結果輸出至（cnt_value）。2.使用hw1_tb.v當Top level Testbench 。3.注意cnt_value只能在每次輸入信號（pulse）負緣後變化一次。 

多功能数字钟，在quartusII软件平台上实现的verilog源代码。大家试试看。(Multifunctional digital clock in quartusII software platform to achieve the verilog source code. We try.)

Advanced FPGA Design - Architecture, Implementation, and Optimization(Advanced FPGA Design- Architecture, Implementation, and Optimization)

vhdl code for cyclic cfft control

很好的NAND Flash 硬件驱动语言，支持VHDL和verilog 语言方便移植，如果有想用FPGA直接驱动NAND flash而又不知如何下手的朋友肯定喜欢。(NAND Flash Controller Reference This reference design is used to interface a NAND Flash device and provides a simple host end interface. The host end interface of this design is user-configurable. It provides buffer select signal, buffer write enable signal, address bus, data bus, error status signal, control and handshake signals for the user......)

FPGA与DSP的EMIF通信，EMIF的RAM这方面相应的程序(FPGA and DSP EMIF communication)