VHDL language design stopwatch, timer function of the realization, the realizati...

用VHDL语言设计多功能的电子表。实现基本电子表的时间显示、闹钟、秒表等功能(VHDL language design with multi-functional electronic watch. The time table to achieve basic electronic display, alarm clock, stopwatch functions)

使用Verilog语言编程，在Quartus ii 上实现的误码检测装置，并通过单片机将误码结果显示在LCD上。本代码具有一定的工程实践价值。(Using the Verilog language programming, implemented on the Quartus ii error detection device, and the result of errors by the microcontroller on the LCD display. The code has some value engineering practice.)

对aurora模块时钟处理模块，实现时钟的分频等处理(Aurora module clock processing module,Clock frequency division and other processing)

Program to implement convolution through VHDL-Program to implement convolution through VHDL...

给出了SVPWM算法的详细FPGA实现方法！(A detailed FPGA SVPWM algorithm to achieve the method!)

用于生成adams或recurdyn所需的路面不平度，用于悬架或其他的仿真(Adams or recurdyn used to generate the required road roughness for suspension or other simulation)

说明：  NAND FLASH的多个仿真模型，可以用于接口设计的测试(NAND FLASH multiple simulation model that can be used for the test interface design)

SPI串行总线接口的Verilog实现，详细讲解实现过程。-SPI serial bus interface Verilog realization elaborate on the realization of the process.

SoC sample Code using Altera Xcaliber, good usefull SoC.

ASK,FSK,PSK,DPSK调制解调的详细仿真代码(ASK, FSK, PSK, DPSK modulation and demodulation detailed simulation code)