VHDL language design stopwatch, timer function of the realization, the realizati...

这是个双端口双端口ram的定义，当然读者在此基础上还可以扩充(This is a dual-port dual-port ram definition, of course, on the basis of the readers can also be expanded)

基于FPGA的运动控制系统设计，包含位置、速度控制等(motion control)

基于uc3842的反激电路的saber仿真模型，可调制，波形结果完美(The saber of the flyback circuit simulation model based on uc3842, modulation, waveform perfect results)

基于FPGA设计的经典打砖块小游戏。游戏简单易玩。(FPGA design based on the classic Arkanoid game. Game easy to play.)

Implementation of Serial Infrared decoder for low-speed IrDA communications.

Rotary Encoder Reading the Rotary Encoder and indicating the selection through a LED placed on the front panel. Events counter for the Rotary Encoder and displaying the events on the front panel Project: events counter for the rotary encoder and displaying the events on the SSD Pmod (Seven-Segments Display Programable module).

利用verilog语言设计实现8路FIR滤波-Using verilog Language Design and Implementation of 8-channel FIR filter

最终FFT 64点使用定点。

VHDL Design of BCD to 7-segment decoder using PROM

ZEDBOARD的管脚分配图和约束文件，包括PCB图和xdc文件(Pin assignment of ZEDBOARD)