URAT 部分VHDL源码 大家多多支持 哈哈

goertzel stuff. contains matlab files and different explanations of how it is used for DTMF decoding.

用verilong hdl语言编写的数据采样程序，A/D采用的是TLC5260-Verilong hdl language used data sampling procedures, A/D using the TLC5260

实现4倍抽取的CIC抽取滤波器模块的Verilog实现，在对数据进行抽取之前，首先进行滤波(Extracted 4 times realize CIC decimation filter module Verilog realize that in the data collected before the first filter)

使用FPGA实现三相直流无刷电机换相，该程序可以使用(Use FPGA to realize the three-phase brushless DC motor commutation, the program can use)

these files are written in verilog but i am uploading in text format

verilog 编写的I2C程序，控制D/A的(I2C program written by Verilog to control D/A)

LDPC QC-LDPC 基于FPGA的QC-LDPC实现 论文(LDPC QC-LDPC FPGA-based QC-LDPC detailed implementation steps Thesis)

串口通信通用模块，FPGA Verilog语言 ise，vivado环境(uart,FPGA Verilog, ise,vivado)

多功能数字钟，在quartusII软件平台上实现的verilog源代码。大家试试看。(Multifunctional digital clock in quartusII software platform to achieve the verilog source code. We try.)

this is fpga based vhdl coding and report for wavlet based image compression in vhdl