变采样滤波器的FPGA实现（25M<-->30.72M变采样）

用于检测100MHZ频率，带51单片机软核，控制外部液晶显示器以及按键等(Used to detect 100MHZ frequency, with 51 SCM soft core, control of external LCD monitors and buttons, etc.)

我们的设计是用一个FSM控制器来控制发送什么命令，flash模块判断FSM发送过来的state信号来选择应该执行什么操作，当命令写入或者读出后，会发送一个flag_done命令，这个命令让我们判断上个指令是否完成，如果完成后FAM将发送下一个命令.(Our design uses a FSM controller to control what commands are sent. The flash module judges the state signal sent by the FSM to select what operation should be performed. When the command is written or read out, a flag_done command is sent. This command lets us judge whether the last word is finished or if the FAM will be sent after completion. The next command)

实现音频的I2S通信，音频柱的显示，及其噪声的处理等功能(Realization of audio I2S communications, audio column display, and its noise processing, and other functions)

国外大学上课用PPT。关于乘法器架构，实现，优化，有booth算法的具体实例。(Foreign university classes PPT. About multipliers architecture, implementation, optimization, there is a specific instance of the booth algorithm.)

xilinx设计指南书中源代码lab2，书中所附实验源代码

说明：  30 bus for atp design

说明：  XC7A35TCSG324-1的Verilog频率计程序，支持十分频，支持切换内外信号输入(Verilog frequency meter program of xc7a35tcsg324-1 supports decadal frequency division and switching internal and external signal input)

资源描述该代码通过例化ram，然后再利用读写指针的比较来判断full和empty的状态，从而实现了同步FIFO的设计

基于fpga的spi通信测试 可与stm32进行spi通信测试(SPI communication test based on FPGA can test SPI communication with stm32)

代码为ahb interface ，用verilog编写的,包括仿真和综合。(Code for the interface AHB, written in Verilog, including simulation and synthesis.)