C51 verilog 源代码，可以在逻辑中实现51单片机功能

verilog写的频率计程序的计数模块,-Verilog written procedures for counting frequency meter module,

基于VHDL语言开发的I486总线接口程序。实现了一个三态的总线，可保证数据的正常传输。-based on VHDL development of the I486 bus interface procedures. Implementation of a three-state bus can ensure that the normal data transmission.

fpga实现ＣＡＮ总线控制器源码,每个项目都有说明文件，介绍使用方法。(fpga CAN Bus Controller source, each with explanatory documents on the use of methods.)

verilog hdl coding DDR sdram control for fpga -verilog hdl coding DDR sdram control for fpga

利用LPM_MUIT宏模块设计一个四位数据乘法器(Use LPM_MUIT macro module design a four data Multiplier)

关于LDPC解码的verilog程序，包含设计代码和验证环境(LDPC decoding on verilog procedures, including the design code and verification environment)

说明：  利用fpga实现gmsk的调制并仿真，全部代码(Fpga implements gmsk)

用于测试ACEX1k30的流水灯程序，晶振频率为20mhz。运行环境Maxplus2-for testing the water ACEX1k30 lights procedures, the frequency of 20MHz crystal oscillator. Operating environment FLEX10K

说明：  QPSK的解调程序，采用Verilog编写而成(QPSK demodulation program, written by Verilog)

verilog例子很丰富，几个经典的,希望对初学者有所帮助-verilog examples of very rich, a few classic, and want to be helpful for beginners