采用低功率乘法器与加法器的低功耗 FIR 滤波器

利用GPIO口模拟I2C通信，驱动富士通MB85RC系列铁电存储器 ** 支持的型号：MB85RC64/64V,MB85RC128/128V,不支持MB85RC16/16V(The master inputs the device address word (8 bits) following the start condition, and then the slave outputs)

该程序用vhdl编写的vga显示的小游戏，到时屏幕上会显示一个小球，一根棒子，一面墙，棒子可以通过按键控制来移动。而小球在不停的运动，遇到墙会反弹。(Game written by the program with VHDL VGA display, the screen will display a small ball, a stick, a wall, stick to move through the key control. Ball in constant motion, encountered the wall will bounce.)

VHDL经典教程,下了不会后悔-VHDL Tutorial classic, the next will not regret it

一些verilo的经典实例，非常适合初学者(verilo of the classic examples, for beginners)

logic lock 的vhdl源码，altera平台适用。-logic lock the VHDL source code, altera platform.

matlab仿真2ask和4ask.可观察信号的时域波形和频谱图。(Matlab simulation 2ask and 4ask. Can observe the signal time domain waveform and spectrum.)

这是用VHDL编写的译码程序,程序简单易懂-VHDL prepared decoding procedures that are simple to understand

NIOSII I2C接口模块及驱动程序，并含有测试程序。对想开发NIOS的工程师很有帮助(NIOSII I2C interface module and driver, and contains the test procedures. NIOS of engineers want to develop useful)

4 seg display, button debouncer, and controller for parking meter

本代码介绍了使用VHDL开发FPGA的一般流程，最终采用了一种基于FPGA的数字频率的实现方法。该设计采用硬件描述语言VHDL，在软件开发平台ISE上完成，可以在较高速时钟频率（100MHz）下正常工作。该设计的频率计能准确的测量频率在1Hz到100MHz之间的信号。使用ModelSim仿真软件对VHDL程序做了仿真，并完成了综合布局布线，最终下载到芯片Spartan-II上取得良好测试效果。-the code on the FPGA using VHDL development of the general process, finally adopted a FPGA-based digital frequency method. The design using VHDL hardware description language, the software development platform ISE completed, the higher speed clock frequency (100MHz) under normal work. The design of the frequency meter can be accurately measured in a frequency of 100MHz between Hz signal. Use ModelSim VHDL simulation software to do the simulation process, and completed a comprehensive layout cabling, downloaded to the final chip Spartan-II made good on the test results.