verilog编写的一个fir滤波器，

数字钟vhdl实现，在线测试无误，具有闹钟，对表功能(Digital clock vhdl implementation, online testing is correct, with alarm, the table function)

本文针对如今我国视频监控的需要，设计并完成了一种基于FPGA芯片的视频监控系统。该系统使用Verilog HDL语言描述整个硬件架构，使得系统性能更为稳定，操作更为简单。该系统通过OV7670摄像头获取图像数据从CMOS图像传感器引入FPGA，并编写了总线接口以便将数据交给Nios Ⅱ处理器处理。经过FPGA采集、

VHDL Design of BCD to 7-segment decoder using PROM

用FPGA中的三速以太网来实现UDP通信，功能强大(With a triple-speed Ethernet in the FPGA to implement UDP communication, powerful)

友晶 altera DE2开发板中文用户手册，对DE2开发板的完整介绍。(DE2 development board Chinese user manual, a complete description of the DE2 board.)

说明：  Basic principle of LDPC code and FPGA implementation of LDPC code

The objective of this project is to design and implement the controller for an electronic safe. You will interface a 16-button keypad to the NIOS boards. The combination code of the safe will be the last

这个文档回答了很多关于AHB总线在使用上经常遇到的问题(this doc gives a lot of answers for using AHB bus when doing design)

master spi的源代码（verilog），包括文档，测试程序(master spi the source code (verilog), including documentation, testing procedures)

国外大学上课用PPT。关于乘法器架构，实现，优化，有booth算法的具体实例。(Foreign university classes PPT. About multipliers architecture, implementation, optimization, there is a specific instance of the booth algorithm.)