抢答器仿真

Xilinx FPGA moving data across asynchronous clock boundaries

LED闪烁的VHDL代码

Ship navigation project

说明：  多通道连续声发射数据采集，每个通道最大5M，采用verilog编程，内部用状态机。(Multichannel continuous acoustic emission data acquisition, each channel up to 5M, using Verilog programming, internal state machine.)

基于FPGA的PWM控制器设计，包含ADC0820模块，按键扫描，PID，PWM控制器等模块，VHDL语言完成，已仿真通过(PWM controller design based on FPGA, including ADC0820 module, key scan, PID, PWM controllers and other modules, VHDL language completed, through simulation)

全数字锁相环的verilog源代码-全数字锁相环的verilog源代码

CH2CH1VHDL 数字电路参考书所有程序3-CH2CH1VHDL digital circuit reference all three procedures

NiosII的C代码,包括网卡,lcd,usb,串口,按键.(NiosII C code, including network cards, lcd, usb, serial, key.)

code qui affiche une image sur ecran vga

说明：  adrv9009的测试平台的测试脚本，适合新人参考(Adrv9009 test platform test script, suitable for new reference)