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frame_syn
- 2010-04-28 10:34:32下载
- 积分:1
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Verilog prepared using USB download cable program realize USB protocol and JTAG...
用verilog编写的USB下载线程序 实现USB协议和JTAG接口的数据转换实现状态机-Verilog prepared using USB download cable program realize USB protocol and JTAG interface to achieve data conversion state machine
- 2022-01-26 07:07:00下载
- 积分:1
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FPGA
verilog编写的QPSK发射机的FPGA部分,已经过验证,完全达到要求。调制矢量误差4%(QPSK transmitter verilog prepared by the FPGA portion, has been proven, fully meet the requirements. Modulation vector error of 4 )
- 2013-10-08 14:58:23下载
- 积分:1
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I2C
关于I2C总线协议的verilog代码,里面包括了3个verilog代码(I2C bus protocol verilog code, which includes three verilog code)
- 2012-08-31 14:31:29下载
- 积分:1
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本例为电子琴VHDL程序原代码,电子琴,可实现基本功能
本例为电子琴VHDL程序原代码,电子琴,可实现基本功能-In this case the procedures for organ VHDL source code, organ, can realize the basic functions of
- 2022-03-23 15:59:38下载
- 积分:1
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STOPWATCH
STOPWATCH FPGA SEVEN SEGMENT DISPLAY
- 2014-04-16 11:08:57下载
- 积分:1
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SPI_UVM_VIP
说明: SPI协议的芯片验证VIP,用UVM搭建平台验证代码(Chip verification VIP of SPI protocol, build platform verification code with UVM)
- 2020-08-25 09:58:15下载
- 积分:1
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user_logic_VGA_Controller,适合于DE2开发板,把这个文件夹放在工程目录之中,就可以在SOPC里直接添加VGA_Controller I...
user_logic_VGA_Controller,适合于DE2开发板,把这个文件夹放在工程目录之中,就可以在SOPC里直接添加VGA_Controller IP核了,很方便使用。-user_logic_VGA_Controller. suitable for Dictyophora development board, this folder on the project directory, it can be added directly SOPC Lane VGA_Controller IP core, very convenient to use.
- 2022-07-06 22:09:23下载
- 积分:1
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IIC总线协议,VHDL语言编写,可以直接使用
IIC总线协议,VHDL语言编写,可以直接使用-IIC bus protocol, VHDL language can be used directly
- 2022-07-11 11:04:33下载
- 积分:1
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ECHO_DE2
Very good info. for RS-232 echo VHDL code .
- 2008-05-31 00:41:53下载
- 积分:1