VHDL电子钟的设计

A program for a simple decoder using ModelSim6

verilog coding for butterworth filter with cut off frequency with 500hz

此代码帮助您在spartan系列fpga上设计交通灯控制器，并使用FSM模型进行设计，使设计更简单，也更易于理解；

spi转i2s的verilog程序，fpga是总模块，spi和i2s是子模块，shiftreg是转换-spi transfer i2s the verilog program, fpga is the total module, spi, and i2s is the sub-module, shiftreg is to convert

基于FPGA的实现小数倍分频代码，广泛应用于数字通信中。-FPGA-based implementation of a small multiple of sub-frequency code, widely used in digital communications.

非常好的catapult学习书, catabult 可用于高级综合，由c产生vhdl/verilog(very nice book for catabult study)

fft变换三个中的一个（站长：三个代码算一个）-one of the three fft transfermation code

The red arrow showed the output became 8 when the measured temperature changed to 11°C. As shown by black arrow, the maximum output was 28. The program was run according to the proposed method.

一个用VerilogHDL语言编写的8X8的乘法器-a Verilog HDL language used in the preparation of the multiplier 8X8

PS2键盘控制器的VHDL源码，用FPGA直接读取键盘的输入并显示。(PS2 keyboard controller VHDL source code, with a direct FPGA to read keyboard input and displayed.)