-
hdb3
这是一个很全的HDB3译码的verilog程序,用于FPGA入门所用,verilog的入门很好的程序(This is a very wide of the HDB3 decoding verilog program for entry-FPGA used, verilog entry procedures for good)
- 2021-04-22 16:08:48下载
- 积分:1
-
FIRDF_design
FIR带通、带阻滤波器设计,需要输入截止频率以及容许偏差。(FIR band pass and band stop filter design)
- 2020-09-28 15:17:44下载
- 积分:1
-
6_ImageBasic
基于System Generator的图像处理工程,多媒体处理FPGA实现的源码,图像基本操作,几何变换,直方图,灰度化处理等(System Generator based image processing engineering, multimedia processing FPGA implementation source code, the basic operation of the image, geometric transformations, histogram, gray processing)
- 2020-10-20 20:07:24下载
- 积分:1
-
FPGA实现打车计程系统
采用FPGA实现打车计程系统设计,实现自动计程及计费,本内容包括硬件程序设计及基于QUARTUS软件的仿真
- 2022-03-25 05:53:10下载
- 积分:1
-
VHDL_COUNTING 000_255 LCD DISPLAY ( ĐẾM 000 ĐẾN 255 HIỂN THỊ LCD BẰNG NGÔN NGỮ VHDL)
VHDL_COUNTING 000_255 液晶显示器 (ĐẾM 000 ĐẾN 255 HIỂN THỊ 液晶电视 BẰNG NGÔN NGỮ VHDL)
- 2022-03-13 13:37:51下载
- 积分:1
-
ATSHA204_SHA256HMAC
ATSHA204_S加密芯片资料,学习使用该芯片必读资料(ATSHA204_S encryption chip data, required reading for learning to use the chip)
- 2013-09-22 10:34:43下载
- 积分:1
-
Modelsim concise user manual is very suitable for novice to use
Modelsim简明使用手册,十分适合新手使用-Modelsim concise user manual is very suitable for novice to use
- 2022-06-17 19:46:19下载
- 积分:1
-
CAN总线控制器源FPGA,都对我的使用说明文件…
fpga实现CAN总线控制器源码,每个项目都有说明文件,介绍使用方法。-fpga CAN Bus Controller source, each with explanatory documents on the use of methods.
- 2022-04-27 17:13:00下载
- 积分:1
-
VHDL由IEEE 1076标准定义的,IEEE标准的VHDL语言参考人…
VHDL is defined by IEEE Standard 1076, IEEE Standard VHDL Language Reference Manual (the VHDL LRM). The original standard was approved in 1987. IEEE procedures require that standards be periodically reviewed and either reaffirmed or revised. The VHDL standard was revised in 1993, 2000, and 2002. In each revision, new language features were added and some existing features enhanced. The aim in each revision was to improve the language as a tool for design and verification of digital systems.
Since the 2002 revision, there have two parallel efforts to further develop the language. The first was the VHDL Procedural Interface (VHPI) Task Force, a subcommittee of the IEEE P1076 Working Group. The VHPI Task Force prepared an interim amendment to the standard, formally approved by IEEE in March 2007. The amendment is titled IEEE 1076c, Standard VHDL Language Reference Manual―Amendment 1: Procedural Language Application Interface.
- 2023-05-31 06:40:03下载
- 积分:1
-
24小时计时时钟
实现24小时计时,因为位数不够,这里是12进位,可自行调整进位数(Realize 24-hour timing, because the number of digits is not enough, here is 12 carry, you can adjust the carry number by yourself.)
- 2020-06-23 19:40:01下载
- 积分:1