prbs编码FPGA实现

数字钟：实验中用到的小程序，用于万年历中的模块(Digital clock: a small program used in the experiment, the modules for calendar)

relative cpu design implementation

说明：  实现Verilog编程，实现超声波测距模块实现测距功能，并将测得的距离显示在数码管上(Verilog programming is realized, ultrasonic ranging module is realized, and the measured distance is displayed on the digital tube)

actel公司用于1553总线的1553BRT-EBR核心代码 包括文档和代码非常有用(Actel company for the 1553 bus 1553BRT-EBR core code, including documentation and code is very useful)

verilog实现彩灯控制、数码管循环显示1～8、1010序列检测器，代码在文件里

verilog code for 8 bit alu

基于FPGA的DDS信号源设计，32位相位累加器，产生可调频率(FPGA-based DDS signal source design, 32-bit phase accumulator to generate tunable frequency)

简单的一个Verilog小程序，适合刚接触的人群(A simple Verilog small program, suitable for people just contact)

FFT 8 PT RDX 2 USING VERILOG

verilog开发FPGA，实现RS485串口通信(RS485 driver for FPGA )