拔河电路的设计

用FPGA verilog hdl实现千兆以太网MAC。-Using FPGA verilog hdl realize Gigabit Ethernet MAC.

FPGA 点亮数码管的灯，本例程支持6位数码管，因为我的FPGA开发板是这样子的(The lamp of digital tube illuminated by FPGA)

数字电压表的实现，VHDL语言实现，AD采用TLC549，通过学习，了解AD采集过程(The realization of digital voltage meter, VHDL language, AD using TLC549, by learning to understand the acquisition process AD)

FPGA与HDMI ADV7511接口源代码(FPGA HDMI Adv7511 interface)

it will count the bit

4dbpsk系统的设计实现源码，几个朋友用一个假期的时间协作完成，功能非常好-The 4dbpsk system design realization source code, several friends complete it cooperation in one vacation time , the function is extremely good

用于altera公司DE2开发板上SD_Card_Audio的实例-DE2 development company for the altera board SD_Card_Audio examples

vhdl编写的4X4键盘扫描程序，可以有效的消除抖动，并且提供蜂鸣器输出。(VHDL prepared 4X4 keyboard scanner, you can effectively eliminate jitter and provide buzzer output.)

速度表（velocity）要求：1．显示汽车Km/h数；2．车轮每转一圈，有一传感脉冲；每个脉冲代表1m的距离；3．采样周期设为10s； 4．要求显示到小数点后边两位；5．用数码管显示；6. 最高时速小于300Km/h。（约为83.3m/s） (use verilog to realize velocity)

说明：  URISC的RTL级设计，Verilog代码(Design: URISC RTL Verilog)