8位十进制频率计，通过验证，目标芯片EPF10KLC84

基于verilog的FFT设计，使用vivado作为开发平台(Verilog based on the FFT design, the use of vivado as a development platform)

哈希算法FPGA实现代码，采用MD5算法，并给出了仿真波形。(MD5 hashing algorithm for FPGA implementation code)

本代码实现了486总线的功能，初学者可以借鉴学习-This code implements the 486 bus functions, beginners can learn to learn

本代码是用VERILOG语言描述的AMI码的解码的程序，经过调试是正确的。代码简单易懂。(This code is described in VERILOG language AMI code decoding process, after debugging is correct. Code is easy to understand.)

代码来源http://www.spacewire.co.uk/video.html，需要CRT显示ITU.656格式的视频的可以参考

TLC5615串行DA的驱动接口,采用verilog编程(TLC5615 driver DA serial interface using verilog programming)

数字时钟，包括流程图以及编码和完整的实验报告，内容详细丰富。(Digital clock, including flowcharts, and coding and a full lab report, detailed and rich.)

说明：  VHDL语言100例详解。详细讲解了用VHDL语言进行数字电路和数字系统设计的知识。用100个实例，不仅进行基础的门电路设计，而且还有较为复杂的数字系统设计。这些实例可以直接被调用。(VHDL Elaborates on 100 cases. Detailed account of VHDL for digital circuits and digital systems design knowledge. With 100 examples, not only for infrastructure gate design, but also more complex digital system design. These examples can be called.)

Routine for I2C in VHDL

This code that genetes a square, sawtooth and a triangular waveform. It is useful for designing a function generator in VHDL.